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EP3SE80 Datasheet(PDF) 72 Page - Altera Corporation

Part No. EP3SE80
Description  Stratix III Device Handbook, Volume 2
Download  341 Pages
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Maker  ALTERA [Altera Corporation]
Homepage  http://www.altera.com
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EP3SE80 Datasheet(HTML) 72 Page - Altera Corporation

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Chapter 1: Stratix III Device Datasheet: DC and Switching Characteristics
I/O Timing
Stratix III Device Handbook, Volume 2
© July 2010
Altera Corporation
Table 1–48 lists the EP3SL50 row pins output timing parameters for differential I/O
standards.
DIFFERENTIAL
2.5-V SSTL
CLASS I
8mA
GCLK
t
co
3.034
3.258
4.627 5.034 5.551 5.411 5.629 5.162
5.680
5.542
5.699
ns
GCLK
PLL
t
co
3.032
3.256
4.625 5.032 5.549 5.409 5.627 5.160
5.677
5.539
5.696
ns
10mA
GCLK
t
co
3.036
3.258
4.617 5.022 5.537 5.397 5.615 5.149
5.664
5.526
5.683
ns
GCLK
PLL
t
co
3.036
3.259
4.625 5.032 5.549 5.409 5.627 5.160
5.677
5.539
5.696
ns
12mA
GCLK
tco
3.052
3.276
4.641 5.047 5.563 5.423 5.641 5.175
5.690
5.552
5.709
ns
GCLK
PLL
t
co
3.052
3.276
4.641 5.047 5.563 5.423 5.641 5.175
5.690
5.552
5.709
ns
DIFFERENTIAL
2.5-V SSTL
CLASS II
16mA
GCLK
t
co
3.042
3.266
4.631 5.037 5.553 5.413 5.631 5.165
5.681
5.543
5.700
ns
GCLK
PLL
t
co
3.035
3.258
4.617 5.022 5.537 5.397 5.615 5.149
5.664
5.526
5.683
ns
Table 1–47. EP3SL50 Column Pins Output Timing Parameters (Part 4 of 4)
I/O Standard
Clock
Fast Model
C2
C3
C4
C4L
I3
I4
I4L
Units
Industrial
Commercial
V
CCL=
1.1 V
V
CCL=
1.1 V
V
CCL=
1.1 V
V
CCL=
1.1 V
V
CCL=
0.9 V
V
CCL=
1.1 V
V
CCL=
1.1 V
V
CCL=
1.1 V
V
CCL=
0.9 V
Table 1–48. EP3SL50 Row Pins Output Timing Parameters (Part 1 of 4)
I/O Standard
Clock
Fast Model
C2
C3
C4
C4L
I3
I4
I4L
Units
Industrial
Commercial
V
CCL=
1.1 V
V
CCL=
1.1 V
V
CCL=
1.1 V
V
CCL=
1.1 V
V
CCL=
0.9 V
V
CCL=
1.1 V
V
CCL=
1.1 V
V
CCL=
1.1 V
V
CCL=
0.9 V
LVDS
GCLK
t
co
2.668
2.842
3.979
4.346
4.821
4.685
4.892
4.453
4.930 4.795
4.940
ns
GCLK
PLL
t
co
3.062
3.288
4.646
5.055
5.575
5.431
5.630
5.186
5.709 5.565
5.694
ns
LVDS_E_1R
GCLK
t
co
3.044
3.278
4.684
5.101
5.629
5.485
5.684
5.237
5.770 5.626
5.755
ns
GCLK
PLL
t
co
2.668
2.842
3.979
4.346
4.821
4.685
4.892
4.453
4.930 4.795
4.940
ns
LVDS_E_3R
GCLK
t
co
3.062
3.288
4.646
5.055
5.575
5.431
5.630
5.186
5.709 5.565
5.694
ns
GCLK
PLL
tco
3.044
3.278
4.684
5.101
5.629
5.485
5.684
5.237
5.770 5.626
5.755
ns
MINI-LVDS
GCLK
t
co
2.668
2.842
3.979
4.346
4.821
4.685
4.892
4.453
4.930 4.795
4.940
ns
GCLK
PLL
tco
3.062
3.288
4.646
5.055
5.575
5.431
5.630
5.186
5.709 5.565
5.694
ns
MINI-
LVDS_E_1R
GCLK
t
co
3.044
3.278
4.684
5.101
5.629
5.485
5.684
5.237
5.770 5.626
5.755
ns
GCLK
PLL
t
co
3.098
3.331
4.730
5.145
5.672
5.528
5.727
5.280
5.809 5.665
5.794
ns
MINI-
LVDS_E_3R
GCLK
t
co
3.084
3.317
4.717
5.132
5.659
5.515
5.714
5.266
5.796 5.652
5.781
ns
GCLK
PLL
t
co
3.080
3.313
4.715
5.132
5.660
5.516
5.715
5.266
5.798 5.654
5.783
ns
RSDS
GCLK
t
co
3.096
3.328
4.716
5.129
5.654
5.510
5.709
5.263
5.791 5.647
5.776
ns
GCLK
PLL
t
co
3.085
3.318
4.712
5.125
5.651
5.507
5.706
5.260
5.788 5.644
5.773
ns


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