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EP3SE80 Datasheet(PDF) 64 Page - Altera Corporation

Part No. EP3SE80
Description  Stratix III Device Handbook, Volume 2
Download  341 Pages
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Maker  ALTERA [Altera Corporation]
Homepage  http://www.altera.com
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EP3SE80 Datasheet(HTML) 64 Page - Altera Corporation

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Chapter 1: Stratix III Device Datasheet: DC and Switching Characteristics
I/O Timing
Stratix III Device Handbook, Volume 2
© July 2010
Altera Corporation
1.8-V
HSTL
CLASS I
4mA
GCLK
t
co
3.035
3.256
4.590
4.986
5.494
5.358
5.565
5.112
5.621
5.486
5.632
ns
GCLK
PLL
t
co
1.304
1.491
1.894
1.969
2.167
2.185
2.107
2.082
2.284
2.301
2.095
ns
6mA
GCLK
t
co
3.028
3.250
4.588
4.985
5.493
5.357
5.564
5.111
5.621
5.486
5.632
ns
GCLK
PLL
t
co
1.297
1.482
1.885
1.968
2.166
2.184
2.106
2.081
2.284
2.301
2.095
ns
8mA
GCLK
tco
3.019
3.242
4.581
4.978
5.486
5.350
5.557
5.104
5.614
5.479
5.625
ns
GCLK
PLL
t
co
1.288
1.474
1.877
1.961
2.159
2.177
2.099
2.074
2.277
2.294
2.088
ns
10mA
GCLK
t
co
3.022
3.244
4.584
4.981
5.490
5.354
5.561
5.107
5.617
5.482
5.628
ns
GCLK
PLL
t
co
1.291
1.476
1.879
1.964
2.163
2.181
2.103
2.077
2.280
2.297
2.091
ns
12mA
GCLK
t
co
3.018
3.241
4.586
4.984
5.493
5.357
5.564
5.110
5.622
5.487
5.633
ns
GCLK
PLL
t
co
1.287
1.473
1.881
1.967
2.166
2.184
2.106
2.080
2.285
2.302
2.096
ns
1.8-V
HSTL
CLASS II
16mA
GCLK
t
co
3.026
3.249
4.584
4.981
5.489
5.353
5.560
5.106
5.616
5.481
5.627
ns
GCLK
PLL
t
co
1.295
1.481
1.879
1.964
2.162
2.180
2.102
2.076
2.279
2.296
2.090
ns
1.5-V
HSTL
CLASS I
4mA
GCLK
tco
3.041
3.262
4.599
4.996
5.505
5.369
5.576
5.121
5.632
5.497
5.643
ns
GCLK
PLL
t
co
1.310
1.498
1.905
1.979
2.178
2.196
2.118
2.091
2.295
2.312
2.106
ns
6mA
GCLK
t
co
3.035
3.257
4.600
4.998
5.507
5.371
5.578
5.123
5.635
5.500
5.646
ns
GCLK
PLL
t
co
1.304
1.489
1.901
1.981
2.180
2.198
2.120
2.093
2.298
2.315
2.109
ns
8mA
GCLK
t
co
3.031
3.253
4.595
4.993
5.502
5.366
5.573
5.118
5.629
5.494
5.640
ns
GCLK
PLL
tco
1.300
1.485
1.895
1.976
2.175
2.193
2.115
2.088
2.292
2.309
2.103
ns
1.2-V
HSTL
CLASS I
4mA
GCLK
t
co
3.043
3.264
4.612
5.012
5.524
5.388
5.595
5.137
5.651
5.516
5.662
ns
GCLK
PLL
t
co
1.312
1.497
1.916
1.995
2.197
2.215
2.137
2.107
2.314
2.331
2.125
ns
6mA
GCLK
tco
3.034
3.256
4.603
5.003
5.515
5.379
5.586
5.128
5.642
5.507
5.653
ns
GCLK
PLL
t
co
1.303
1.488
1.905
1.986
2.188
2.206
2.128
2.098
2.305
2.322
2.116
ns
8mA
GCLK
t
co
3.033
3.256
4.610
5.011
5.524
5.388
5.595
5.137
5.652
5.517
5.663
ns
GCLK
PLL
t
co
1.302
1.488
1.909
1.994
2.197
2.215
2.137
2.107
2.315
2.332
2.126
ns
3.0-V PCI
GCLK
t
co
3.114
3.338
4.626
5.016
5.494
5.359
5.561
5.144
5.625
5.513
5.635
ns
GCLK
PLL
tco
1.436
1.622
1.973
2.052
2.208
2.226
2.148
2.167
2.327
2.382
2.139
ns
3.0-V
PCI-X
GCLK
t
co
3.114
3.338
4.626
5.016
5.494
5.359
5.561
5.144
5.625
5.513
5.635
ns
GCLK
PLL
t
co
1.436
1.622
1.973
2.052
2.208
2.226
2.148
2.167
2.327
2.382
2.139
ns
Table 1–44. EP3SL50 Row Pins output Timing Parameters (Part 4 of 4)
I/O
Standard
Clock
Fast Model
C2
C3
C4
C4L
I3
I4
I4L
Units
Industrial Commercial
V
CCL=
1.1 V
V
CCL=
1.1 V
V
CCL=
1.1 V
V
CCL=
1.1 V
V
CCL=
0.9 V
V
CCL=
1.1 V
V
CCL=
1.1 V
V
CCL=
1.1 V
V
CCL=
0.9 V


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