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CDCEL937PWG4 Datasheet(PDF) 11 Page - Texas Instruments |
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CDCEL937PWG4 Datasheet(HTML) 11 Page - Texas Instruments |
11 / 30 page EEPROM Xin Xout VDD GND Vddout X-tal Y2=27MHz Y1=27MHz Y3=27MHz LV CMOS Pdiv1 =1 Y4=27MHz Y5=27MHz Y6=27MHz Y7=27MHz LV CMOS Pdiv7=1 Pdiv6=1 LV CMOS LV CMOS Pdiv5=1 Pdiv4=1 LV CMOS LV CMOS Pdiv3=1 Pdiv2=1 LV CMOS Programming and SDA/SCA Register InputClock PLL Bypass PLL1 powerdown PLL Bypass PLL 2 powerdown PLL Bypass PLL3 powerdown S0 SDA SCL 27 MHz Crystal ProgrammingBus “1” = outputsenabled “0” =outputs3-State CDCE937 CDCEL937 www.ti.com SLAS564F – AUGUST 2007 – REVISED MARCH 2010 S1/SDA and S2/SCL pins of the CDCE937/CDCEL937 are dual function pins. In default configuration they are defined as SDA/SCL for the serial interface. They can be programmed as control-pins (S1/S2) by setting the relevant bits in the EEPROM. Note that the changes to the Control register (Bit [6] of Byte [02]) have no effect until they are written into the EEPROM. Once they are set as control pins, the serial programming interface is no longer available. However, if VDDOUT is forced to GND, the two control-pins, S1 and S2, temporally act as serial programming pins (SDA/SCL). S0 is not a multi-use pin, it is a control pin only. DEFAULT DEVICE SETTING The internal EEPROM of CDCE937/CDCEL937 is preconfigured as shown in Figure 6. (The input frequency is passed through to the output as a default). This allows the device to operate in default mode without the extra production step of program it. The default setting appears after power is supplied or after power-down/up sequence until it is re-programmed by the user to a different application configuration. A new register setting is programmed via the serial SDA/SCL Interface. Figure 6. Default Device Setting Table 4 shows the factory default setting for the Control Terminal Register (external control pins). In normal operation, all 8 register settings are available, but in the default configuration only the first two settings (0 and 1) can be selected with S0, as S1 and S2 configured as programming pins in default mode. Table 4. Factory Default Setting for Control Terminal Register(1) Y1 PLL1 Settings PLL2 Settings PLL3 Settings Frequenc Frequenc Output Frequency SSC Output SSC Output SSC Output External Control Pins y y Selection Selection Selection Selection Selection Selection Selection Selection Selection Selection S2 S1 S0 Y1 FS1 SSC1 Y2Y3 FS2 SSC2 Y4Y5 FS3 SSC3 Y6Y7 SCL (I2C) SDA (I2C) 0 3-state fVCO1_0 off 3-state fVCO2_0 off 3-state fVCO1_0 off 3-state SCL (I2C) SDA (I2C) 1 enabled fVCO1_0 off enabled fVCO2_0 off enabled fVCO1_0 off enabled (1) In default mode or when programmed respectively, S1 and S2 act as serial programming interface, SDA/SCL. They do not have any control-pin function but they are internally interpreted as if S1=0 and S2=0. S0, however, is a control-pin which in the default mode switches all outputs ON or OFF (as previously predefined). Copyright © 2007–2010, Texas Instruments Incorporated Submit Documentation Feedback 11 Product Folder Link(s): CDCE937 CDCEL937 |
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