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PCA9534APWRG4 Datasheet(PDF) 8 Page - Texas Instruments

Part # PCA9534APWRG4
Description  REMOTE 8-BIT I2C AND SMBus LOW-POWER I/O EXPANDER WITH INTERRUPT OUTPUT AND CONFIGURATION REGISTERS
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

PCA9534APWRG4 Datasheet(HTML) 8 Page - Texas Instruments

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PCA9534A
SCPS141F – SEPTEMBER 2006 – REVISED JUNE 2010
www.ti.com
Table 5. Command Byte
CONTROL
COMMAND
POWER-UP
REGISTER BITS
REGISTER
PROTOCOL
BYTE (HEX)
DEFAULT
B1
B0
0
0
0x00
Input Port
Read byte
xxxx xxxx
0
1
0x01
Output Port
Read/write byte
1111 1111
1
0
0x02
Polarity Inversion
Read/write byte
0000 0000
1
1
0x03
Configuration
Read/write byte
1111 1111
Register Descriptions
The input port register (register 0) reflects the incoming logic levels of the pins, regardless of whether the pin is
defined as an input or an output by the configuration register. It only acts on read operation. Writes to these
registers have no effect. The default value, X, is determined by the externally applied logic level.
Before a read operation, a write transmission is sent with the command byte to let the I2C device know that the
input port register will be accessed next.
Table 6. Register 0 (Input Port Register)
BIT
I7
I6
I5
I4
I3
I2
I1
I0
DEFAULT
X
X
X
X
X
X
X
X
The output port register (register 1) shows the outgoing logic levels of the pins defined as outputs by the
configuration register. Bit values in this register have no effect on pins defined as inputs. In turn, reads from this
register reflect the value that is in the flip-flop controlling the output selection, not the actual pin value.
Table 7. Register 1 (Output Port Register)
BIT
O7
O6
O5
O4
O3
O2
O1
O0
DEFAULT
1
1
1
1
1
1
1
1
The polarity inversion register (register 2) allows polarity inversion of pins defined as inputs by the configuration
register. If a bit in this register is set (written with 1), the corresponding port pin polarity is inverted. If a bit in this
register is cleared (written with a 0), the corresponding port pin original polarity is retained.
Table 8. Register 2 (Polarity Inversion Register)
BIT
N7
N6
N5
N4
N3
N2
N1
N0
DEFAULT
0
0
0
0
0
0
0
0
The configuration register (register 3) configures the directions of the I/O pins. If a bit in this register is set to 1,
the corresponding port pin is enabled as an input with high-impedance output driver. If a bit in this register is
cleared to 0, the corresponding port pin is enabled as an output.
Table 9. Register 3 (Configuration Register)
BIT
C7
C6
C5
C4
C3
C2
C1
C0
DEFAULT
1
1
1
1
1
1
1
1
Power-On Reset
When power (from 0 V) is applied to VCC, an internal power-on reset holds the PCA9534A in a reset condition
until VCC has reached VPOR. At that point, the reset condition is released and the PCA9534A registers and
I2C/SMBus state machine initialize to their default states. After that, VCC must be lowered to below 0.2 V and
then back up to the operating voltage for a power-reset cycle.
8
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Product Folder Link(s): PCA9534A


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