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PCA9534ADGVR Datasheet(PDF) 1 Page - Texas Instruments |
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PCA9534ADGVR Datasheet(HTML) 1 Page - Texas Instruments |
1 / 39 page DB,DBQ,DGV,DW,ORPWPACKAGE (TOP VIEW) 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 A0 A1 A2 P0 P1 P2 P3 GND V CC SDA SCL INT P7 P6 P5 P4 RGVPACKAGE (TOP VIEW) 16 6 8 2 10 P7 4 3 1 7 5 12 11 9 13 14 15 P6 INT SCL A2 P0 P1 P2 RGTPACKAGE (TOP VIEW) 16 6 8 2 10 P7 4 3 1 7 5 12 11 9 13 14 15 P6 INT SCL A2 P0 P1 P2 PCA9534A www.ti.com SCPS141F – SEPTEMBER 2006 – REVISED JUNE 2010 REMOTE 8-BIT I2C AND SMBus LOW-POWER I/O EXPANDER WITH INTERRUPT OUTPUT AND CONFIGURATION REGISTERS Check for Samples: PCA9534A 1 FEATURES • Low Standby Current Consumption of • Polarity Inversion Register 1 mA Max • Internal Power-On Reset • I2C to Parallel Port Expander • Power-Up With All Channels Configured as • Open-Drain Active-Low Interrupt Output Inputs • Operating Power-Supply Voltage Range of • No Glitch on Power-Up 2.3 V to 5.5 V • Noise Filter on SCL/SDA Inputs • 5-V Tolerant I/O Ports • Latched Outputs With High-Current Drive • 400-kHz Fast I2C Bus Maximum Capability for Directly Driving LEDs • Three Hardware Address Pins Allow Up to • Latch-Up Performance Exceeds 100 mA Per Eight Devices on the I2C/SMBus JESD 78, Class II • Allows Up to 16 Devices on the I2C/SMBus • ESD Protection Exceeds JESD 22 When Used in Conjunction with the PCA9534 – 2000-V Human-Body Model (A114-A) See Table 1 for I2C Expander offerings – 200-V Machine Model (A115-A) • Input/Output Configuration Register – 1000-V Charged-Device Model (C101) DESCRIPTION/ORDERING INFORMATION This 8-bit I/O expander for the two-line bidirectional bus (I2C) is designed for 2.3-V to 5.5-V VCC operation. It provides general-purpose remote I/O expansion for most microcontroller families via the I2C interface [serial clock (SCL), serial data (SDA)]. The PCA9534A consists of one 8-bit configuration (input or output selection), input port, output port, and polarity inversion (active high or active low) register. At power on, the I/Os are configured as inputs. However, the system master can enable the I/Os as either inputs or outputs by writing to the I/O configuration bits. The data for each input or output is kept in the corresponding input or output register. The polarity of the input port register can be inverted with the polarity inversion register. All registers can be read by the system master. The system master can reset the PCA9534A in the event of a timeout or other improper operation by utilizing the power-on reset feature, which puts the registers in their default state and initializes the I2C/SMBus state machine. The PCA9534A open-drain interrupt (INT) output is activated when any input state differs from its corresponding input port register state and is used to indicate to the system master that an input state has changed. 1 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PRODUCTION DATA information is current as of publication date. Copyright © 2006–2010, Texas Instruments Incorporated Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. |
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