CANH

CANL

47 nF

VI

± 20%

TXD

W

27

±1 %

W

27

±1 %

OC

V

=

O(CANH)

V

O (CANL)

V

+

2

GND 1

GND 2

V

OC

V

OC(pp)

TXD

RXD

60

W

V

I

15 pF

CANH

CANL

+

_

± 20%

±1%

GND1

TXDInput

0 V

Vcc

Output

RXD

50%

50%

VOH

VOL

tloop1

50%

tloop

2

R

(seeNoteB )

CANH

CANH

TXD

± 1 %

W

(seeNote A )

C

L

V

I

GND 1

Vcc

V

I

500 mV

900 mV

0 V

0 V

ISO1050

www.ti.com

SLLS983C – JUNE 2009 – REVISED JULY 2010

Figure 8. Peak-to-Peak Output Voltage Test Circuit and Waveform

A.

The input pulse is supplied by a generator having the following characteristics: PRR

B.

Figure 10. Dominant Timeout Test Circuit and Voltage Waveforms

Copyright © 2009–2010, Texas Instruments Incorporated

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Product Folder Link(s): ISO1050