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DESCRIPTION/ORDERING INFORMATION (CONTINUED)

B1

DIR

5

7

A1

2

B2

6

A2

3

SN74AVCH2T45

DUAL-BIT DUAL-SUPPLY BUS TRANSCEIVER

WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS

SCES582F – JULY 2004 – REVISED NOVEMBER 2007

The SN74AVCH2T45 is designed for asynchronous communication between data buses. The device transmits

data from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the

direction-control (DIR) input.

preventing damaging current backflow through the device when it is powered down.

state. The bus-hold circuitry on the powered-up side always stays active.

Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors

with the bus-hold circuitry is not recommended.

NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the

package.

(each transceiver)

INPUT

OPERATION

DIR

L

B data to A bus

H

A data to B bus

(1)

Input circuits of the data I/Os

always are active.

LOGIC DIAGRAM (POSITIVE LOGIC)(1)

(1)

Pin numbers shown are for the DCT and DCU packages.

2

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