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LM3S9790-IQN50-C1T Datasheet(PDF) 8 Page - Texas Instruments

Part # LM3S9790-IQN50-C1T
Description  Stellaris짰 LM3S9790 Microcontroller
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

LM3S9790-IQN50-C1T Datasheet(HTML) 8 Page - Texas Instruments

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19.3
Functional Description ................................................................................................. 784
19.3.1 Initialization ................................................................................................................. 785
19.3.2 Operation ................................................................................................................... 786
19.3.3 Transmitting Message Objects ..................................................................................... 787
19.3.4 Configuring a Transmit Message Object ........................................................................ 787
19.3.5 Updating a Transmit Message Object ........................................................................... 788
19.3.6 Accepting Received Message Objects .......................................................................... 789
19.3.7 Receiving a Data Frame .............................................................................................. 789
19.3.8 Receiving a Remote Frame .......................................................................................... 789
19.3.9 Receive/Transmit Priority ............................................................................................. 790
19.3.10 Configuring a Receive Message Object ........................................................................ 790
19.3.11 Handling of Received Message Objects ........................................................................ 791
19.3.12 Handling of Interrupts .................................................................................................. 793
19.3.13 Test Mode ................................................................................................................... 794
19.3.14 Bit Timing Configuration Error Considerations ............................................................... 796
19.3.15 Bit Time and Bit Rate ................................................................................................... 796
19.3.16 Calculating the Bit Timing Parameters .......................................................................... 798
19.4
Register Map .............................................................................................................. 801
19.5
CAN Register Descriptions .......................................................................................... 802
20
Ethernet Controller .............................................................................................. 834
20.1
Block Diagram ............................................................................................................ 835
20.2
Signal Description ....................................................................................................... 836
20.3
Functional Description ................................................................................................. 837
20.3.1 MAC Operation ........................................................................................................... 837
20.3.2 Internal MII Operation .................................................................................................. 840
20.3.3 PHY Operation ............................................................................................................ 840
20.3.4 Interrupts .................................................................................................................... 843
20.3.5 DMA Operation ........................................................................................................... 843
20.4
Initialization and Configuration ..................................................................................... 844
20.4.1 Hardware Configuration ............................................................................................... 844
20.4.2 Software Configuration ................................................................................................ 845
20.5
Register Map .............................................................................................................. 845
20.6
Ethernet MAC Register Descriptions ............................................................................. 847
20.7
MII Management Register Descriptions ......................................................................... 872
21
Universal Serial Bus (USB) Controller ............................................................... 893
21.1
Block Diagram ............................................................................................................ 894
21.2
Signal Description ....................................................................................................... 894
21.3
Functional Description ................................................................................................. 896
21.3.1 Operation as a Device ................................................................................................. 896
21.3.2 Operation as a Host .................................................................................................... 901
21.3.3 OTG Mode .................................................................................................................. 905
21.3.4 DMA Operation ........................................................................................................... 907
21.4
Initialization and Configuration ..................................................................................... 908
21.4.1 Pin Configuration ......................................................................................................... 908
21.4.2 Endpoint Configuration ................................................................................................ 908
21.5
Register Map .............................................................................................................. 909
21.6
Register Descriptions .................................................................................................. 920
June 14, 2010
8
Texas Instruments-Advance Information
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