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LM3S8733-IGZ25-A2T Datasheet(PDF) 9 Page - Texas Instruments |
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LM3S8733-IGZ25-A2T Datasheet(HTML) 9 Page - Texas Instruments |
9 / 616 page List of Figures Figure 1-1. Stellaris ® LM3S8733 Microcontroller High-Level Block Diagram ............................. 37 Figure 2-1. CPU Block Diagram ............................................................................................. 46 Figure 2-2. TPIU Block Diagram ............................................................................................ 47 Figure 5-1. JTAG Module Block Diagram ................................................................................ 57 Figure 5-2. Test Access Port State Machine ........................................................................... 60 Figure 5-3. IDCODE Register Format ..................................................................................... 66 Figure 5-4. BYPASS Register Format .................................................................................... 66 Figure 5-5. Boundary Scan Register Format ........................................................................... 67 Figure 6-1. Basic RST Configuration ...................................................................................... 69 Figure 6-2. External Circuitry to Extend Power-On Reset ........................................................ 70 Figure 6-3. Reset Circuit Controlled by Switch ........................................................................ 70 Figure 6-4. Power Architecture .............................................................................................. 72 Figure 6-5. Main Clock Tree .................................................................................................. 75 Figure 7-1. Hibernation Module Block Diagram ..................................................................... 136 Figure 7-2. Clock Source Using Crystal ................................................................................ 137 Figure 7-3. Clock Source Using Dedicated Oscillator ............................................................. 138 Figure 8-1. Flash Block Diagram .......................................................................................... 155 Figure 9-1. GPIO Port Block Diagram ................................................................................... 181 Figure 9-2. GPIODATA Write Example ................................................................................. 182 Figure 9-3. GPIODATA Read Example ................................................................................. 182 Figure 10-1. GPTM Module Block Diagram ............................................................................ 223 Figure 10-2. 16-Bit Input Edge Count Mode Example .............................................................. 227 Figure 10-3. 16-Bit Input Edge Time Mode Example ............................................................... 228 Figure 10-4. 16-Bit PWM Mode Example ................................................................................ 229 Figure 11-1. WDT Module Block Diagram .............................................................................. 259 Figure 12-1. ADC Module Block Diagram ............................................................................... 283 Figure 12-2. Differential Sampling Range, VIN_ODD = 1.5 V ...................................................... 286 Figure 12-3. Differential Sampling Range, VIN_ODD = 0.75 V .................................................... 287 Figure 12-4. Differential Sampling Range, VIN_ODD = 2.25 V .................................................... 287 Figure 12-5. Internal Temperature Sensor Characteristic ......................................................... 288 Figure 13-1. UART Module Block Diagram ............................................................................. 319 Figure 13-2. UART Character Frame ..................................................................................... 320 Figure 13-3. IrDA Data Modulation ......................................................................................... 322 Figure 14-1. SSI Module Block Diagram ................................................................................. 359 Figure 14-2. TI Synchronous Serial Frame Format (Single Transfer) ........................................ 362 Figure 14-3. TI Synchronous Serial Frame Format (Continuous Transfer) ................................ 362 Figure 14-4. Freescale SPI Format (Single Transfer) with SPO=0 and SPH=0 .......................... 363 Figure 14-5. Freescale SPI Format (Continuous Transfer) with SPO=0 and SPH=0 .................. 363 Figure 14-6. Freescale SPI Frame Format with SPO=0 and SPH=1 ......................................... 364 Figure 14-7. Freescale SPI Frame Format (Single Transfer) with SPO=1 and SPH=0 ............... 365 Figure 14-8. Freescale SPI Frame Format (Continuous Transfer) with SPO=1 and SPH=0 ........ 365 Figure 14-9. Freescale SPI Frame Format with SPO=1 and SPH=1 ......................................... 366 Figure 14-10. MICROWIRE Frame Format (Single Frame) ........................................................ 367 Figure 14-11. MICROWIRE Frame Format (Continuous Transfer) ............................................. 368 Figure 14-12. MICROWIRE Frame Format, SSIFss Input Setup and Hold Requirements ............ 368 9 June 22, 2010 Texas Instruments-Production Data Stellaris® LM3S8733 Microcontroller |
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