Electronic Components Datasheet Search |
|
74AUC2G125DCTRE4 Datasheet(PDF) 2 Page - Texas Instruments |
|
74AUC2G125DCTRE4 Datasheet(HTML) 2 Page - Texas Instruments |
2 / 14 page www.ti.com DESCRIPTION/ORDERING INFORMATION (CONTINUED) 1A 1Y 1OE 1 2 6 2A 2Y 2OE 7 5 3 SN74AUC2G125 DUAL BUS BUFFER GATE WITH 3-STATE OUTPUTS SCES532D – DECEMBER 2003 – REVISED AUGUST 2007 This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. For more information about AUC Little Logic devices, please refer to the TI application report, Applications of Texas Instruments AUC Sub-1-V Little Logic Devices, literature number SCEA027. FUNCTION TABLE (EACH BUFFER) INPUTS OUTPUT Y OE A L H H L L L H X Z LOGIC DIAGRAM (POSITIVE LOGIC) 2 Submit Documentation Feedback |
Similar Part No. - 74AUC2G125DCTRE4 |
|
Similar Description - 74AUC2G125DCTRE4 |
|
|
Link URL |
Privacy Policy |
ALLDATASHEET.COM |
Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Datasheet Upload | Contact us | Privacy Policy | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
Family Site : ic2ic.com |
icmetro.com |