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CC430F5135IRGZ Datasheet(PDF) 16 Page - Texas Instruments

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Part No. CC430F5135IRGZ
Description  MSP430 SoC with RF Core
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Maker  TI [Texas Instruments]
Homepage  http://www.ti.com
Logo TI - Texas Instruments

CC430F5135IRGZ Datasheet(HTML) 16 Page - Texas Instruments

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ECCN 5E002 TSPA - Technology / Software Publicly Available
CC430F613x
CC430F612x
CC430F513x
SLAS554D – MAY 2009 – REVISED JULY 2010
www.ti.com
CPU
The MSP430 CPU has a 16-bit RISC architecture that is highly transparent to the application. All operations,
other than program-flow instructions, are performed as register operations in conjunction with seven addressing
modes for source operand and four addressing modes for destination operand.
The CPU is integrated with 16 registers that provide reduced instruction execution time. The register-to-register
operation execution time is one cycle of the CPU clock.
Four of the registers, R0 to R3, are dedicated as program counter, stack pointer, status register, and constant
generator, respectively. The remaining registers are general-purpose registers.
Peripherals are connected to the CPU using data, address, and control buses, and can be handled with all
instructions.
The instruction set consists of the original 51 instructions with three formats and seven address modes and
additional instructions for the expanded address range. Each instruction can operate on word and byte data.
Operating Modes
The CC430 has one active mode and five software selectable low-power modes of operation. An interrupt event
can wake up the device from any of the low-power modes, service the request, and restore back to the
low-power mode on return from the interrupt program.
The following six operating modes can be configured by software:
Active mode (AM)
All clocks are active
Low-power mode 0 (LPM0)
CPU is disabled
ACLK and SMCLK remain active, MCLK is disabled
FLL loop control remains active
Low-power mode 1 (LPM1)
CPU is disabled
FLL loop control is disabled
ACLK and SMCLK remain active, MCLK is disabled
Low-power mode 2 (LPM2)
CPU is disabled
MCLK and FLL loop control and DCOCLK are disabled
DCO's dc-generator remains enabled
ACLK remains active
Low-power mode 3 (LPM3)
CPU is disabled
MCLK, FLL loop control, and DCOCLK are disabled
DCO's dc-generator is disabled
ACLK remains active
Low-power mode 4 (LPM4)
CPU is disabled
ACLK is disabled
MCLK, FLL loop control, and DCOCLK are disabled
DCO's dc-generator is disabled
Crystal oscillator is stopped
Complete data retention
16
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Copyright © 2009–2010, Texas Instruments Incorporated


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