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CC430F5135IRGZ Datasheet(PDF) 14 Page - Texas Instruments

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Part No. CC430F5135IRGZ
Description  MSP430 SoC with RF Core
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

CC430F5135IRGZ Datasheet(HTML) 14 Page - Texas Instruments

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ECCN 5E002 TSPA - Technology / Software Publicly Available
CC430F613x
CC430F612x
CC430F513x
SLAS554D – MAY 2009 – REVISED JULY 2010
www.ti.com
CC430F513x Terminal Functions (continued)
TERMINAL
I/O(1)
DESCRIPTION
NAME
NO.
AVCC_RF
28
Radio analog power supply
RF
Positive RF input to LNA in receive mode
RF_P
29
I/O
Positive RF output from PA in transmit mode
RF
Negative RF input to LNA in receive mode
RF_N
30
I/O
Negative RF output from PA in transmit mode
AVCC_RF
31
Radio analog power supply
AVCC_RF
32
Radio analog power supply
RBIAS
33
External bias resistor for radio reference current
GUARD
34
Power supply connection for digital noise isolation
General-purpose digital I/O
PJ.0/ TDO
35
I/O
Test data output port
General-purpose digital I/O
PJ.1/ TDI/ TCLK
36
I/O
Test data input or test clock input
General-purpose digital I/O
PJ.2/ TMS
37
I/O
Test mode select
General-purpose digital I/O
PJ.3/ TCK
38
I/O
Test clock
Test mode pin – select digital I/O on JTAG pins
TEST/ SBWTCK
39
I
Spy-bi-wire input clock
Reset input active low
RST/NMI/ SBWTDIO
40
I/O
Non-maskable interrupt input
Spy-bi-wire data input/output
DVCC
41
Digital power supply
AVSS
42
Analog ground supply for ADC12
General-purpose digital I/O
P5.1/ XOUT
43
I/O
Output terminal of crystal oscillator XT1
General-purpose digital I/O
P5.0/ XIN
44
I/O
Input terminal for crystal oscillator XT1
AVCC
45
Analog power supply
General-purpose digital I/O with port interrupt and map-able secondary function
Default mapping: SVM output
P2.5/ PM_SVMOUT/ CB5/
Comparator_B input CB5
46
I/O
A5/ VREF+/ VeREF+
Analog input A5 – 12-bit ADC
Output of reference voltage to the ADC
Input for an external reference voltage to the ADC
General-purpose digital I/O with port interrupt and map-able secondary function
Default mapping: RTCCLK output
P2.4/ PM_RTCCLK/ CB4/
Comparator_B input CB4
47
I/O
A4/ VREF-/ VeREF-
Analog input A4 – 12-bit ADC
Negative terminal for the ADC's reference voltage for both sources, the internal
reference voltage, or an external applied reference voltage
General-purpose digital I/O with port interrupt and map-able secondary function
Default mapping: TA1 CCR2 compare output/capture input
P2.3/ PM_TA1CCR2A/ CB3/ A3
48
I/O
Comparator_B input CB3
Analog input A3 – 12-bit ADC
Ground supply
VSS - Exposed die attach pad
The exposed die attach pad must be connected to a solid ground plane as this is
the ground connection for the chip!
14
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Copyright © 2009–2010, Texas Instruments Incorporated


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