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CC430F5135IRGZ Datasheet(PDF) 91 Page - Texas Instruments

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Part No. CC430F5135IRGZ
Description  MSP430 SoC with RF Core
Download  118 Pages
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

CC430F5135IRGZ Datasheet(HTML) 91 Page - Texas Instruments

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P1.5/P1MAP5(/R23)
P1.6/P1MAP6(/R13)
P1.7/P1MAP7(/R03)
P1SEL.x
1
0
P1DIR.x
P1IN.x
P1IRQ.x
EN
to Port Mapping
1
0
from Port Mapping
P1OUT.x
Interrupt
Edge
Select
Q
EN
Set
P1SEL.x
P1IES.x
P1IFG.x
P1IE.x
1
0
DVSS
DVCC
1
P1DS.x
0: Low drive
1: High drive
D
from Port Mapping
to LCD_B
Pad Logic
Bus
Keeper
Direction
0: Input
1: Output
P1REN.x
P1MAP.x = PMAP_ANALOG
(n/a CC430F513x)
ECCN 5E002 TSPA - Technology / Software Publicly Available
CC430F613x
CC430F612x
CC430F513x
www.ti.com
SLAS554D – MAY 2009 – REVISED JULY 2010
Port P1, P1.5 to P1.7, Input/Output With Schmitt Trigger
CC430F513x devices don't provide LCD functionality on port P1 pins.
Table 48. Port P1 (P1.5 to P1.7) Pin Functions
CONTROL BITS/SIGNALS
PIN NAME (P1.x)
x
FUNCTION
P1DIR.x
P1SEL.x
P1MAPx
P1.5/P1MAP5/R23
5
P1.5 (I/O)
I: 0; O: 1
0
X
Mapped secondary digital function - see Table 7
0; 1(1)
1
≤ 30(1)
R23(2) (not available on CC430F513x)
X
1
= 31
P1.6/P1MAP6/R13/
6
P1.6 (I/O)
I: 0; O: 1
0
X
LCDREF
Mapped secondary digital function - see Table 7
0; 1(1)
1
≤ 30(1)
R13/LCDREF(2) (not available on CC430F513x)
X
1
= 31
P1.7/P1MAP7/R03
7
P1.7 (I/O)
I: 0; O: 1
0
X
Mapped secondary digital function - see Table 7
0; 1(1)
1
≤ 30(1)
R03(2) (not available on CC430F513x)
X
1
= 31
(1)
According to mapped function - see Table 7.
(2)
Setting P1SEL.x bit together with P1MAPx = PM_ANALOG disables the output driver as well as the input Schmitt trigger.
Copyright © 2009–2010, Texas Instruments Incorporated
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