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NCP1117LPST18T3G Datasheet(PDF) 2 Page - ON Semiconductor

Part # NCP1117LPST18T3G
Description  1.0 A Low-Dropout Positive Fixed and Adjustable Voltage Regulators
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Manufacturer  ONSEMI [ON Semiconductor]
Direct Link  http://www.onsemi.com
Logo ONSEMI - ON Semiconductor

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NCP1117LP
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2
Figure 3. Block Diagram
Table 1. PIN FUNCTION DESCRIPTION
Pin No.
Pin Name
Description
1
Adj (GND)
A resistor divider from this pin to the Vout pin and ground sets the output voltage (Ground only for
Fixed−Mode).
2
Vout
The output of the regulator. A minimum of 10 mF capacitor (20 mW ≤ ESR ≤ 20 W) must be connec-
ted from this pin to ground to insure stability.
3
Vin
The input pin of regulator. Typically a large storage capacitor (20 mW ≤ ESR ≤ 20 W) is connected
from this pin to ground to insure that the input voltage does not sag below the minimum dropout
voltage during the load transient response. This pin must always be 1.3 V (typ.) higher than Vout in
order for the device to regulate properly.
Table 2. MAXIMUM RATINGS
Rating
Symbol
Value
Unit
DC Input Voltage
Vin
−0.3 to 18
V
Operating Junction Temperature Range
TOP
0 to 125
°C
Operating Ambient Temperature Range
TA
0 to 125
°C
Maximum Junction Temperature Range
TJ(max)
−55 to 150
°C
Power Dissipation and Thermal Characteristics
− Power Dissipation (Note 1)
− Thermal Resistance, Junction−to−Ambient (Note 2)
− Thermal Resistance, Junction−to−Case
PD
RqJA
RqJC
Internally Limited
108
15
W
°C/W
°C/W
Electrostatic Discharge
Human Body Model
ESD
2000
V
Machine Model
200
Storage Temperature Range
TSTG
−65 to 150
°C
NOTE: This device series contains ESD protection and exceeds the following tests:
ESD HBM tested per AEC−Q100−002 (EIA/JESD22−A114)
ESD MM tested per AEC−Q100−003 (EIA/JESD22−A115)
Latch–up Current Maximum Rating: ≤ 150mA per JEDEC standard: JESD78
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
NOTE: All voltages are referenced to GND pin.
1. The maximum package power dissipation is:
PD +
TJ(max) * TA
RqJA
2. RqJA on a 100 x 100 mm PCB Cu thickness 1 oz; TA = 25°C


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