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STM6522 Datasheet(PDF) 10 Page - STMicroelectronics |
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STM6522 Datasheet(HTML) 10 Page - STMicroelectronics |
10 / 25 page Pin descriptions STM6522 10/25 Doc ID 17045 Rev 2 2.5 Adjustable delay of Smart Reset™ (SRC pin) This pin controls the setup time before the push-button action is validated by the reset output. It is connected to an external capacitor (CSRC), which is tied to ground to provide the desired value of setup time (tSRC). Selected calculated tSRC and CSRC examples are given in Table 2. Refer also to Table 5. 2.6 Reset output (RST1) This output is active-low, open-drain with no internal pull-up resistor. 2.7 Reset output (RST2) This output is active-low, open-drain with no internal pull-up resistor. Table 2. tSRC programmed by an ideal external capacitor Calculated CSRC value [µF] Setup delay tSRC [s] (1)(2) 1. At 25 ° C. Example calculations based on an ideal capacitor. During application design and component selection it should be considered that the current flowing into the external tSRC programming capacitor (CSRC) is on the order of 100 nA, therefore a low-leakage capacitor (ceramic or film capacitor) should be used and placed as close as possible to the SRC pin. Also an adequate low-leakage PCB environment should be ensured to prevent tSRC accuracy from being affected. A recommended minimum value of CSRC is 0.1 µF. 2. In case of quickly repeated activations of tSRC counter, an interval of 10 ms min. is needed between the activations to fully discharge CSRC, so that the next tSRC is as specified. Closest common CSRC value [µF] Min. Typ. Max. 0.2 2 2.5 3.0 0.22 0.3 3 3.75 4.5 0.33 0.6 6 7.5 9 0.56 1 10 12.5 15 1 |
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