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PC912XDP512J1MFVR Datasheet(PDF) 54 Page - Freescale Semiconductor, Inc |
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PC912XDP512J1MFVR Datasheet(HTML) 54 Page - Freescale Semiconductor, Inc |
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54 / 1348 page  Chapter 1 Device Overview MC9S12XD-Family MC9S12XDP512 Data Sheet, Rev. 2.21 54 Freescale Semiconductor PK2 ADDR18 IQSTAT2 — — VDDX PUCR Up Extended address, PIPE status PK1 ADDR17 IQSTAT1 — — VDDX PUCR Up Extended address, PIPE status PK0 ADDR16 IQSTAT0 — — VDDX PUCR Up Extended address, PIPE status PM7 TXCAN3 TXD3 TXCAN4 — VDDX PERM/ PPSM Disabled Port M I/O, TX of CAN3 and CAN4, TXD of SCI3 PM6 RXCAN3 RXD3 RXCAN4 — VDDX PERM/PPSM Disabled Port M I/O RX of CAN3 and CAN4, RXD of SCI3 PM5 TXCAN2 TXCAN0 TXCAN4 SCK0 VDDX PERM/PPSM Disabled Port M I/O CAN0, CAN2, CAN4, SCK of SPI0 PM4 RXCAN2 RXCAN0 RXCAN4 MOSI0 VDDX PERM/PPSM Disabled Port M I/O, CAN0, CAN2, CAN4, MOSI of SPI0 PM3 TXCAN1 TXCAN0 — SS0 VDDX PERM/PPSM Disabled Port M I/O TX of CAN1, CAN0, SS of SPI0 PM2 RXCAN1 RXCAN0 — MISO0 VDDX PERM/PPSM Disabled Port M I/O, RX of CAN1, CAN0, MISO of SPI0 PM1 TXCAN0 — — VDDX PERM/PPSM Disabled Port M I/O, TX of CAN0 PM0 RXCAN0 — — VDDX PERM/PPSM Disabled Port M I/O, RX of CAN0 PP7 KWP7 PWM7 SCK2 — VDDX PERP/ PPSP Disabled Port P I/O, interrupt, channel 7 of PWM, SCK of SPI2 PP6 KWP6 PWM6 SS2 — VDDX PERP/ PPSP Disabled Port P I/O, interrupt, channel 6 of PWM, SS of SPI2 PP5 KWP5 PWM5 MOSI2 — VDDX PERP/ PPSP Disabled Port P I/O, interrupt, channel 5 of PWM, MOSI of SPI2 PP4 KWP4 PWM4 MISO2 — VDDX PERP/ PPSP Disabled Port P I/O, interrupt, channel 4 of PWM, MISO2 of SPI2 PP3 KWP3 PWM3 SS1 — VDDX PERP/ PPSP Disabled Port P I/O, interrupt, channel 3 of PWM, SS of SPI1 PP2 KWP2 PWM2 SCK1 — VDDX PERP/ PPSP Disabled Port P I/O, interrupt, channel 2 of PWM, SCK of SPI1 PP1 KWP1 PWM1 MOSI1 — VDDX PERP/ PPSP Disabled Port P I/O, interrupt, channel 1 of PWM, MOSI of SPI1 PP0 KWP0 PWM0 MISO1 — VDDX PERP/ PPSP Disabled Port P I/O, interrupt, channel 0 of PWM, MISO2 of SPI1 PS7 SS0 — — — VDDX PERS/ PPSS Up Port S I/O, SS of SPI0 PS6 SCK0 — — — VDDX PERS/ PPSS Up Port S I/O, SCK of SPI0 Table 1-7. Signal Properties Summary (Sheet 3 of 4) Pin Name Function 1 Pin Name Function 2 Pin Name Function 3 Pin Name Function 4 Pin Name Function 5 Power Supply Internal Pull Resistor Description CTRL Reset State |
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