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PC912XDP512J1MPVR Datasheet(PDF) 34 Page - Freescale Semiconductor, Inc |
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PC912XDP512J1MPVR Datasheet(HTML) 34 Page - Freescale Semiconductor, Inc |
34 / 1348 page Chapter 1 Device Overview MC9S12XD-Family MC9S12XDP512 Data Sheet, Rev. 2.21 34 Freescale Semiconductor • Development support — Single-wire background debug™ mode (BDM) — Four on-chip hardware breakpoints 1.1.2 Modes of Operation Normal expanded mode, Emulation of single-chip mode and Emulation of expanded mode are ony available on family members with an external bus interface in 144-pin LQFP. See Appendix E Derivative Differences for package options. User modes: • Normal and emulation operating modes — Normal single-chip mode — Normal expanded mode — Emulation of single-chip mode — Emulation of expanded mode • Special Operating Modes — Special single-chip mode with active background debug mode — Special test mode (Freescale use only) Low-power modes: • System stop modes — Pseudo stop mode — Full stop mode • System wait mode 1.1.3 Block Diagram Figure 1-1 shows a block diagram of theMC9S12X-Family. The block diagram shows all modules available on cover part MC9S12XDP512RMV2. Availability of modules on other family members see Appendix E Derivative Differences. Figure 1-2 shows blocks integrated on maskset M42E. The 16 channel ATD Converter is routed to pins PAD00 - PAD15 on maskset M42E. See Chapter 4 Analog-to-Digital Converter (ATD10B16CV4) Block Description 123. |
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