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PAC7202CPV70 Datasheet(PDF) 53 Page - Freescale Semiconductor, Inc |
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PAC7202CPV70 Datasheet(HTML) 53 Page - Freescale Semiconductor, Inc |
53 / 976 page MAC7200 Microcontroller Family Reference Manual, Rev. 2 Freescale Semiconductor liii Tables i Conventions ........................................................................................................................ lxvi ii Terminology....................................................................................................................... lxvii iii Register Diagram Conventions ......................................................................................... lxxiii iv Register Field Description Conventions ........................................................................... lxxiv v EXREG Field Descriptions............................................................................................... lxxiv 1-1 List of MAC72xx Devices .......................................................................................................7 1-2 Typical System Access Summary............................................................................................9 1-3 Chip Mode Encodings............................................................................................................10 1-4 System Memory Maps ...........................................................................................................14 2-1 MCU Mode Selection Signals ...............................................................................................17 2-2 MCU Mode Selection ............................................................................................................18 2-3 Oscillator Type Selection.......................................................................................................20 2-4 Nexus Port Selection..............................................................................................................21 2-5 Nexus Hardware Configuration .............................................................................................21 2-6 External Bus Configuration ...................................................................................................21 3-1 Low Power Modes .................................................................................................................23 3-2 Wakeup Sources.....................................................................................................................25 3-3 Low Power Mode Entry Summary ........................................................................................26 3-4 Low Power Mode Exit Summary ..........................................................................................26 4-1 Signal Properties ....................................................................................................................33 4-2 MAC72xx Power and Ground Connection Summary ...........................................................56 5-1 Clocks Summary ....................................................................................................................59 5-2 Clock Source Selection ..........................................................................................................63 5-3 Module Clock Usage Overview.............................................................................................68 6-1 System Reset Sources ............................................................................................................73 7-1 ARM Exception Table ...........................................................................................................79 7-2 Interrupt Sources ....................................................................................................................82 7-3 ARM7 Core Exception ..........................................................................................................86 8-1 JTAG Test Logic Selection....................................................................................................92 8-2 Debug External Pins ..............................................................................................................97 8-3 ARM7TDMI-S Debug State Overview .................................................................................99 9-1 Device Memory Map in Normal Single Chip Mode (After Reset) .....................................106 9-2 Allowed Memory Maps in Normal Single Chip Mode .......................................................106 9-3 Device Memory Map in Normal/Secured Primary Bootloader Mode (After Reset)...........107 9-4 Allowed Memory Maps in Normal Primary Bootloader Mode...........................................108 9-5 Device Memory Map in Normal Expanded Mode (After Reset) ........................................108 Table Number Title Page Number |
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