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CAT5269WI-00-T1 Datasheet(PDF) 5 Page - ON Semiconductor |
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CAT5269WI-00-T1 Datasheet(HTML) 5 Page - ON Semiconductor |
5 / 16 page CAT5269 © 2009 SCILLC. All rights reserved. 5 Doc. No. MD-2123 Rev. F Characteristics subject to change without notice POWER UP TIMING (1)(2) Symbol Parameter Max Units tPUR Power-up to Read Operation 1 ms tPUW Power-up to Write Operation 1 ms WIPER TIMING Symbol Parameter Max Units tWRPO Wiper Response Time After Power Supply Stable 10 µs tWRL Wiper Response Time After Instruction Issued 10 µs WRITE CYCLE LIMITS (3) Symbol Parameter Max Units tWR Write Cycle Time 5 ms RELIABILITY CHARACTERISTICS Symbol Parameter Reference Test Method Min Max Units NEND (1) Endurance MIL-STD-883, Test Method 1033 1,000,000 Cycles/Byte TDR (1) Data Retention MIL-STD-883, Test Method 1008 100 Years VZAP (1) ESD Susceptibility MIL-STD-883, Test Method 3015 2000 V ILTH (1) Latch-Up JEDEC Standard 17 100 mA Notes: (1) This parameter is tested initially and after a design or process change that affects the parameter. (2) tPUR and tPUW are delays required from the time VCC is stable until the specified operation can be initiated. (3) The write cycle is the time from a valid stop condition of a write sequence to the end of the internal program/erase cycle. During the write cycle, the bus interface circuits are disabled, SDA is allowed to remain high, and the device does not respond to its slave address. Figure 1. Bus Timing tHIGH SCL SDA IN SDAOUT tLOW tF tLOW tR tBUF tSU:STO tSU:DAT tHD:DAT tHD:STA tSU:STA tAA tDH |
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