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ADT7463ARQ Datasheet(PDF) 6 Page - ON Semiconductor |
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ADT7463ARQ Datasheet(HTML) 6 Page - ON Semiconductor |
6 / 52 page REV. C –6– ADT7463 FUNCTIONAL DESCRIPTION General Description The ADT7463 is a complete systems monitor and multiple fan controller for any system requiring monitoring and cooling. The device communicates with the system via a serial system management bus. The serial bus controller has an optional address line for device selection (Pin 14), a serial data line for reading and writing addresses and data (Pin 1), and an input line for the serial clock (Pin 2). All control and programming functions of the ADT7463 are performed over the serial bus. In addition, two of the pins can be reconfigured as an SMBALERT output to indicate out-of-limit conditions. Measurement Inputs The device has six measurement inputs, four for voltage and two for temperature. It can also measure its own supply voltage and can measure ambient temperature with its on-chip tempera- ture sensor. Pins 20 through 23 are analog inputs with on-chip attenuators, configured to monitor 5 V, 12 V, 2.5 V, and the processor core voltage (2.25 V input), respectively. Power is supplied to the chip via Pin 4, and the system also monitors VCC through this pin. In PCs, this pin is normally connected to a 3.3 V standby supply. This pin can, however, be connected to a 5 V supply and monitor it without overranging. Remote temperature sensing is provided by the D1� and D2� inputs, to which diode-connected, external temperature-sensing transistors, such as a 2N3904 or CPU thermal diode, may be connected. The ADC also accepts input from an on-chip band gap tem- perature sensor that monitors system ambient temperature. Sequential Measurement When the ADT7463 monitoring sequence is started, it cycles sequentially through the measurement of analog inputs and the temperature sensors. Measured values from these inputs are stored in value registers. These can be read out over the serial bus or can be compared with programmed limits stored in the limit registers. The results of out-of-limit comparisons are stored in the status registers, which can be read over the serial bus to flag out-of-limit conditions. Processor Voltage ID Five digital inputs (VID0 to VID5—Pins 5 to 8, 19, and 21) read the processor voltage ID code and store it in the VID register, from which it can be read out by the management system over the serial bus. The VID code monitoring function is compatible with both VRM9.x and future VRM10 solutions. Additionally, an SMBALERT can be generated to flag a change in VID code. ADT7463 Address Selection Pin 13 is the dual-function PWM3/ADDRESS ENABLE pin. If Pin 13 is pulled low on power-up, the ADT7463 reads the state of Pin 14 (TACH4/ADDRESS SELECT/ THERM pin) to determine the ADT7463’s slave address. If Pin 13 is high on power-up, then the ADT7463 defaults to the SMBus slave Address 0x2E. This function is described in more detail later. INTERNAL REGISTERS OF THE ADT7463 A brief description of the ADT7463’s principal internal registers is given below. More detailed information on the function of each register is given in Tables IV to XLII. Configuration Registers The configuration registers provide control and configuration of the ADT7463, including alternate pinout functionality. Address Pointer Register This register contains the address that selects one of the other internal registers. When writing to the ADT7463, the first byte of data is always a register address, which is written to the address pointer register. Status Registers These registers provide the status of each limit comparison and are used to signal out-of-limit conditions on the temperature, voltage, or fan speed channels. If Pin 10 or Pin 22 is con- figured as SMBALERT, then this pin asserts low whenever a status bit gets set. Interrupt Mask Registers These registers allow each interrupt status event to be masked when Pin 10 or Pin 22 is configured as an SMBALERT output. VID Register The status of the VID0 to VID5 pins of the processor can read from this register. VID code changes can also generate SMBALERT interrupts. Value and Limit Registers The results of analog voltage inputs, temperature, and fan speed measurements are stored in these registers, along with their limit values. Offset Registers These registers allow each temperature channel reading to be offset by a twos complement value written to these registers. TMIN Registers These registers program the starting temperature for each fan under automatic fan speed control. TRANGE Registers These registers program the temperature-to-fan speed control slope in automatic fan speed control mode for each PWM output. Operating Point Registers These registers define the target operating temperatures for each thermal zone when running under dynamic TMIN control. This function allows the cooling solution to adjust dynamically in response to measured temperature and system performance. Enhance Acoustics Registers These registers allow each PWM output controlling fan to be tweaked to enhance the system’s acoustics. Rev. 4 | Page 6 of 52 | www.onsemi.com |
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