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ADM1027 Datasheet(PDF) 46 Page - ON Semiconductor |
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ADM1027 Datasheet(HTML) 46 Page - ON Semiconductor |
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46 / 56 page  REV. A –46– ADM1027 Table XV. Fan Tachometer Limit Registers Register Address R/W Description Power-On Default 0x54 Read/Write TACH 1 Minimum Low Byte 0xFF 0x55 Read/Write TACH 1 Minimum High Byte 0xFF 0x56 Read/Write TACH 2 Minimum Low Byte 0xFF 0x57 Read/Write TACH 2 Minimum High Byte 0xFF 0x58 Read/Write TACH 3 Minimum Low Byte 0xFF 0x59 Read/Write TACH 3 Minimum High Byte 0xFF 0x5A Read/Write TACH 4 Minimum Low Byte 0xFF 0x5B Read/Write TACH 4 Minimum High Byte 0xFF Exceeding any of the TACH limit registers by 1 indicates that the fan is running too slowly or has stalled. The appropriate status bit will be set in Interrupt Status Register 2 to indicate the fan failure. Setting the Configuration Register 1 lock bit has no effect on these registers. Table XVI. PWM Configuration Registers Register Address R/W Description Power-On Default 0x5C Read/Write PWM1 Configuration 0x62 0x5D Read/Write PWM2 Configuration 0x62 0x5E Read/Write PWM3 Configuration 0x62 Bit Name Read/Write Description <2:0> SPIN Read/Write These bits control the startup timeout for PWMx. The PWM output stays high until two (Fan Startup valid TACH rising edges are seen from the fan. If there is not a valid TACH signal during Timeout) the fan TACH measurement directly after the fan startup timeout period, then the TACH measurement will read 0xFFFF and Status Register 2 will reflect the fan fault. If the TACH minimum high and low byte contains 0xFFFF or 0x0000, then the Status Register 2 bit will not be set, even if the fan has not started. 000 = No startup timeout 001 = 100 ms 010 = 250 ms (default) 011 = 400 ms 101 = 1 sec 110 = 2 sec 111 = 4 sec Note: Do not program 100. <3> Reserved Read-Only Reserved for future use. <4> INV Read/Write This bit inverts the PWM output. The default is 0, which corresponds to a logic high output for 100% duty cycle. Setting this bit to 1, inverts the PWM output, so 100% duty cycle corresponds to a logic low output. <7:5> BHVR Read/Write These bits assign each fan to a particular temperature sensor for localized cooling. 000 = Remote 1 temperature controls PWMx (automatic fan control mode). 001 = Local temperature controls PWMx (automatic fan control mode). 010 = Remote 2 temperature controls PWMx (automatic fan control mode). 011 = PWMx runs full speed (default). 100 = PWMx disabled. 101 = Fastest speed calculated by local and Remote 2 temperature controls PWMx. 110 = Fastest speed calculated by all three temperatures controls PWMx. 111 = Manual mode. PWM duty cycle registers (Reg. 0x30 to 0x32) become writable. These registers become read-only when the configuration register 1 lock bit is set to 1. Any subsequent attempts to write to these registers will fail. Rev. 3 | Page 46 of 56 | www.onsemi.com |
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