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ADM1025 Datasheet(PDF) 19 Page - ON Semiconductor

Part No. ADM1025
Description  Low Cost PC Hardware Monitor ASIC
Download  21 Pages
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Maker  ONSEMI [ON Semiconductor]
Homepage  http://www.onsemi.com
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ADM1025 Datasheet(HTML) 19 Page - ON Semiconductor

 
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Preliminary Technical Data
ADM1025/ADM1025A
Rev. P5 | Page 19 of 21| www.onsemi.com
Table 11. Register 41h – Status Register 1 (Power-On Default
<7:0> = 00h)
Bit
Name
R/W
Description
0
+2.5 V_Error
Read-
Only
A 1 indicates a high or low limit
has been exceeded.
1
VCCP_Error
Read-
Only
A 1 indicates a high or low limit
has been exceeded.
2
+3.3 V_Error
Read-
Only
A 1 indicates a high or low limit
has been exceeded.
3
+5 V_Error
Read-
Only
A 1 indicates a high or low limit
has been exceeded.
4
Local Temp
Error
Read-
Only
A 1 indicates a high or a low
temperature limit has been
exceeded.
5
Remote
Temp Error
Read-
Only
A 1 indicates a high or low
Remote temperature limit has
been exceeded.
6
Reserved
7
Reserved
Table 12. Register 42h – Status Register 2 (Power-On Default
<7:0> = 00h)
Bit
Name
R/W
Description
0
+12 V_Error
Read-
Only
A 1 indicates a high or low limit
has been exceeded.
1
VCC_Error
Read-
Only
A 1 indicates a high or low limit
has been exceeded.
2
Reserved
Read-
Only
Undefined
3
Reserved
Read-
Only
Undefined
4
Reserved
Read-
Only
Undefined
5
Reserved
Read-
Only
Undefined
6
Remote
Diode Fault
Read-
Only
A one indicates either a short or
open circuited fault on the
remote thermal diode inputs.
7
Reserved
Read-
Only
Undefined
Table 13. Register 47h – VID REGISTER (Power-On Default
= 0000 (VID[3:0]))
Bit
Name
R/W
Description
0–3
VID[3:0]
Read-Only
The VID[3:0] inputs from
Pentium/PRO power
supplies to indicate the
operating voltage (e.g.,
1.3 V to 2.9 V).
4–5
Reserved
Read-Only
Undefined
6
Offset
Config
Read/Write
Configures offset register
to be used with internal
or external channel. If Bit
0 of Test Register = 1 and
Bit 7 of VID Register = 0,
then setting this bit to 1
configures tHhe Offset
Register to the internal
temperature channel.
Clearing this bit
configures the Offset
Register to the external
temperature channel.
(Default = 0.)
7
RST
ENABLE
Read/Write
When set to 1, enables
the RST output function
on Pin 16. This bit
defaults to 0 on power-
up. (RST Disabled.)
Table 14. Register 49h – VID4 Register (Power-On Default =
1000 000(VID4))
Bit
Name
R/W
Description
0
VID4
Read
VID4 Input (If Selected)
(Defaults to 0)
1–7
Reserved
Read


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