Electronic Components Datasheet Search |
|
NJW4351VC3 Datasheet(PDF) 9 Page - New Japan Radio |
|
NJW4351VC3 Datasheet(HTML) 9 Page - New Japan Radio |
9 / 18 page NJW4351 - 9 - * When ENABLE is active OUT terminals are OFF, but internal logic circuit is ON. Fig.5 Full Step Mode / Enable Sequence Fig.6 Half Step Mode / Enable Sequence Fig.7 Full Step Mode / Reset Sequence Fig.8 Half Step Mode / Rest Sequence * When ENABLE is active OUT terminals are OFF, but internal logic circuit is ON. * When RESET is active OUT terminals are OFF, and internal logic circuit is to reset. OUT2B OUT2A OUT1B OUT1A POR RESET H DIR ENABLE HSM STEP 12 341 23 4 1 L H L L OFF ON OFF ON MO ON OUT2B OUT2A OUT1B OUT1A POR RESET H DIR ENABLE HSM STEP 1 2 3 456 78 1 L H H L OFF ON OFF ON MO ON OUT2B OUT2A OUT1B OUT1A POR RESET H DIR ENABLE HSM STEP 12 * * * 1 2 3 4 L H L L OFF ON OFF ON MO ON OUT2B OUT2A OUT1B OUT1A POR RESET H DIR ENABLE HSM STEP 12 12 3 4 L H H L OFF ON OFF ON MO ON ** * * When RESET is active OUT terminals are OFF, and internal logic circuit is to reset. |
Similar Part No. - NJW4351VC3 |
|
Similar Description - NJW4351VC3 |
|
|
Link URL |
Privacy Policy |
ALLDATASHEET.COM |
Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Datasheet Upload | Contact us | Privacy Policy | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
Family Site : ic2ic.com |
icmetro.com |