Control Register and Command Byte

0

0

0

0

B1

B0

0

0

Register Descriptions

PCA9538

The last bit of the slave address defines the operation (read or write) to be performed. When it is high (1), a read

is selected while a low (0) selects a write operation.

Following the successful Acknowledgment of the address byte, the bus master sends a command byte that is

stored in the control register in the PCA9538 (see Figure 5). Two bits of this command byte state the operation

(read or write) and the internal register (input, output, polarity inversion or configuration) that will be affected. This

Once a command byte has been sent, the register that was addressed continues to be accessed by reads until a

new command byte has been sent.

Figure 5. Control Register Bits

Command Byte Table

CONTROL REGISTER BITS

COMMAND BYTE

REGISTER

PROTOCOL

POWER-UP DEFAULT

(HEX)

B1

B0

0

0

0x00

Input Port

Read byte

XXXX XXXX

0

1

0x01

Output Port

Read/write byte

1111 1111

1

0

0x02

Polarity Inversion

Read/write byte

0000 0000

1

1

0x03

Configuration

Read/write byte

1111 1111

The Input Port register (register 0) reflects the incoming logic levels of the pins, regardless of whether the pin is

defined as an input or an output by the Configuration register. It only acts on read operation. Writes to these

registers have no effect. The default value, X, is determined by the externally applied logic level.

Input Port register is accessed next.

Register 0 (Input Port Register) Table

BIT

I7

I6

I5

I4

I3

I2

I1

I0

DEFAULT

X

X

X

X

X

X

X

X

The Output Port register (register 1) shows the outgoing logic levels of the pins defined as outputs by the

Configuration register. Bit values in this register have no effect on pins defined as inputs. In turn, reads from this

register reflect the value that is in the flip-flop controlling the output selection, not the actual pin value.

Register 1 (Output Port Register) Table

BIT

O7

O6

O5

O4

O3

O2

O1

O0

DEFAULT

1

1

1

1

1

1

1

1

The Polarity Inversion register (register 2) allows polarity inversion of pins defined as inputs by the Configuration

register. If a bit in this register is set (written with 1), the corresponding port pin polarity is inverted. If a bit in this

register is cleared (written with a 0), the corresponding port pin original polarity is retained.

Register 2 (Polarity Inversion Register) Table

BIT

N7

N6

N5

N4

N3

N2

N1

N0

DEFAULT

0

0

0

0

0

0

0

0

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