CDCV304PW datasheet(3/12 Pages) TI

Part #	CDCV304PW

Description	200-MHz GENERAL-PURPOSE CLOCK BUFFER, PCI-X COMPLIANT

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Manufacturer	TI [Texas Instruments]

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TIMING REQUIREMENTS

ELECTRICAL CHARACTERISTICS

SWITCHING CHARACTERISTICS

CDCV304

www.ti.com................................................................................................................................................ SCAS643F – SEPTEMBER 2000 – REVISED APRIL 2009

over operating free-air temperature range (unless otherwise noted)

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

fclk

Clock frequency

0

200

MHz

over recommended operating free-air temperature range (unless otherwise noted)

PARAMETER

TEST CONDITIONS

MIN

TYP(1)

MAX

UNIT

VIK

Input voltage

VDD = 3 V,

II = –18 mA

–1.2

V

VDD = 2.3 V,

IOH = –8 mA

1.8

VDD = 2.3 V,

IOH = –16 mA

1.5

VOH

High-level output voltage

VDD = min to max,

IOH = –1 mA

VDD – 0.2

V

VDD = 3 V,

IOH = –24 mA

2

VDD = 3 V,

IOH = –12 mA

2.4

VDD = 2.3 V,

IOL = 8 mA

0.5

VDD = 2.3 V,

IOL = 16 mA

0.7

VOL

Low-level output voltage

VDD = min to max,

IOL = 1 mA

0.2

V

VDD = 3 V,

IOL = 24 mA

0.8

VDD = 3 V,

IOL = 12 mA

0.55

VDD = 3 V,

VO = 1 V

–50

IOH

High-level output current

mA

VDD = 3.3 V,

VO = 1.65 V

–55

VDD = 3 V,

VO = 2 V

60

IOL

Low-level output current

mA

VDD = 3.3 V,

VO = 1.65 V

70

II

Input current

VI = VO or VDD

±5

µA

f = 67 MHz,

VDD = 2.7 V

28

IDD

Dynamic current, see Figure 5

mA

f = 67 MHz,

VDD = 3.6 V

37

CI

Input capacitance

VDD = 3.3 V,

VI = 0 V or VDD

3

pF

CO

Output capacitance

VDD = 3.3 V,

VI = 0 V or VDD

3.2

pF

(1)

All typical values are with respect to nominal VDD and TA = 25°C.

VDD = 2.5 V ± 10%, CL= 10 pF (unless otherwise noted)

PARAMETER

TEST CONDITIONS

MIN

TYP(1)

MAX

UNIT

tPLH

Low-to-high propagation delay

2

2.9

4.5

See Figure 1 and Figure 2

ns

tPHL

High-to-low propagation delay

2

3

4.5

tsk(o)

Output skew(2)

See Figure 3

50

150

ps

tr

Output rise slew rate

1.5

2.2

4

V/ns

tf

Output fall slew rate

1.5

2.2

4

V/ns

(1)

All typical values are with respect to nominal VDD.

(2)

The tsk(o) specification is only valid for equal loading of all outputs.

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