SG2524, SG3524

REGULATING PULSEWIDTH MODULATORS

SLVS077D – APRIL 1977 – REVISED FEBRUARY 2003

12

POST OFFICE BOX 655303

SG2524

COMP

.

CURR LIM+

EMIT 2

COL 2

COL 1

EMIT 1

GND

OSC OUT

CT

RT

REF OUT

IN+

IN–

0.01

µF

0.1

µF

5 k

Ω

5 k

Ω

2 k

Ω

50

µF

–5 V

20 mA

1N916

1N916

20

µF

1N916

15 k

Ω

VCC = 15 V

VCC

CURR LIM–

SHUTDOWN

+

1

2

16

6

7

10

3

11

12

13

14

4

5

9

8

15

5 k

Ω

+

Figure 12. Capacitor-Diode Output Circuit

VCC = 5 V

0.1

µF

1 M

Ω

300

Ω

1N916

1N916

20T

200

Ω

–15 V

20 mA

15 V

50

µF

50

µF

50T

50T

TIP29A

1

Ω

1N916

620

Ω

510

Ω

2N2222

4.7

µF

0.001

µF

0.02

µF

5 k

Ω

2 k

Ω

100

µF

5 k

Ω

5 k

Ω

SG2524

VCC

OSC OUT

GND

COMP

CURR LIM+

EMIT 2

COL 2

COL 1

EMIT 1

CURR LIM–

CT

RT

REF OUT

IN+

IN–

+

+

SHUTDOWN

25 k

Ω

+

+

1

2

16

6

7

10

3

11

12

13

14

4

5

9

15

8

Input

Return

Figure 13. Flyback Converter Circuit

†Throughout these discussions, references to the SG2524 apply also to the SG3524.