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LTC6992HDCB6-4-TRPBF Datasheet(PDF) 5 Page - Linear Technology |
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LTC6992HDCB6-4-TRPBF Datasheet(HTML) 5 Page - Linear Technology |
5 / 32 page LTC6992-1/LTC6992-2/ LTC6992-3/LTC6992-4 5 69921234p Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note 2: The LTC6992C is guaranteed functional over the operating temperature range of –40°C to 85°C. Note 3: The LTC6992C is guaranteed to meet specified performance from 0°C to 70°C. The LTC6992C is designed, characterized and expected to meet specified performance from –40°C to 85°C but it is not tested or QA sampled at these temperatures. The LTC6992I is guaranteed to meet specified performance from –40°C to 85°C. The LTC6992H is guaranteed to meet specified performance from –40°C to 125°C. Note 4: Frequency accuracy is defined as the deviation from the fOUT equation, assuming RSET is used to program the frequency. Note 5: See Operation section, Table 1 and Figure 2 for a full explanation of how the DIV pin voltage selects the value of DIVCODE. Note 6: Duty cycle setting time is the is the amount of time required for the output to settle within ±1% of the final duty cycle after a ±10% change in the setting (±80mV step in VMOD). Note 7: To conform to the Logic IC Standard, current out of a pin is arbitrarily given a negative value. Note 8: Output rise and fall times are measured between the 10% and the 90% power supply levels with 5pF output load. These specifications are based on characterization. Note 9: Long term drift on silicon oscillators is primarily due to the movement of ions and impurities within the silicon and is tested at 30°C under otherwise nominal operating conditions. Long term drift is specified as ppm/√kHr due to the typically non-linear nature of the drift. To calculate drift for a set time period, translate that time into thousands of hours, take the square root and multiply by the typical drift number. For instance, a year is 8.77kHr and would yield a drift of 888ppm at 300ppm/√kHr. Drift without power applied to the device may be approximated as 1/10th of the drift with power, or 30ppm/√kHr for a 300ppm/√kHr device. Note 10: Frequency change settling time is the amount of time required for the output to settle within ±1% of the final frequency after a 0.5x or 2x change in ISET. Note 11: Jitter is the ratio of the peak-to-peak deviation of the period to the mean of the period. This specification is based on characterization and is not 100% tested. ELECTRICAL CHARACTERISTICS SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS tr Output Rise Time (Note 8) V+ = 5.5V V+ = 3.3V V+ = 2.25V 1.1 1.7 2.7 ns ns ns tf Output Fall Time (Note 8) V+ = 5.5V V+ = 3.3V V+ = 2.25V 1.0 1.6 2.4 ns ns ns The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. Test conditions are V+ = 2.25V to 5.5V, VMOD = 0V to VSET, DIVCODE = 0 to 15 (NDIV = 1 to 16,384), RSET = 50k to 800k, RLOAD = 5k, CLOAD = 5pF unless otherwise noted. |
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