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LTC6990CS6-TRPBF Datasheet(PDF) 4 Page - Linear Technology |
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LTC6990CS6-TRPBF Datasheet(HTML) 4 Page - Linear Technology |
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4 / 28 page  LTC6990 4 6990p ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. Test conditions are V+ = 2.25V to 5.5V, OE = V+, DIVCODE = 0 to 15 (NDIV = 1 to 128), RSET = 25k to 800k, RLOAD = ∞, CLOAD = 5pF unless otherwise noted. Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note 2: The LTC6990C is guaranteed functional over the operating temperature range of –40°C to 85°C. Note 3: The LTC6990C is guaranteed to meet specified performance from 0°C to 70°C. The LTC6990C is designed, characterized and expected to meet specified performance from –40°C to 85°C but it is not tested or QA sampled at these temperatures. The LTC6990I is guaranteed to meet specified performance from –40°C to 85°C. The LTC6990H is guaranteed to meet specified performance from –40°C to 125°C. Note 4: Frequency accuracy is defined as the deviation from the fOUT equation, assuming RSET is used to program the frequency. Note 5: See Operation section, Table 1 and Figure 2 for a full explanation of how the DIV pin voltage selects the value of DIVCODE. Note 6: The OE pin has hysteresis to accommodate slow rising or falling signals. The threshold voltages are proportional to V+. Typical values can be estimated at any supply voltage using VOE(RISING) ≈ 0.55 • V+ + 185mV and VOE(FALLING) ≈ 0.48 • V+ – 155mV. Note 7: To conform to the Logic IC Standard, current out of a pin is arbitrarily given a negative value. Note 8: Output rise and fall times are measured between the 10% and the 90% power supply levels with 5pF output load. These specifications are based on characterization. Note 9: Settling time is the amount of time required for the output to settle within ±1% of the final frequency after a 0.5x or 2x change in ISET. Note 10: Jitter is the ratio of the deviation of the period to the mean of the period. This specification is based on characterization and is not 100% tested. SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS Digital I/O OE Pin Input Capacitance 2.5 pF OE Pin Input Current OE = 0V to V+ l ±10 nA VIH High Level OE Pin Input Voltage (Note 6) l 0.7•V+ V VIL Low Level OE Pin Input Voltage (Note 6) l 0.3•V+ V OUT Pin Hi-Z Leakage OE = 0V, DIVCODE ≥ 8, OUT = 0V to V+ ±10 μA IOUT(MAX) Maximum Output Current ±20 mA VOH High Level Output Voltage (Note 7) V+ = 5.5V IOH = –1mA IOH = –16mA l l 5.45 4.84 5.48 5.15 V V V+ = 3.3V IOH = –1mA IOH = –10mA l l 3.24 2.75 3.27 2.99 V V V+ = 2.25V IOH = –1mA IOH = –8mA l l 2.17 1.58 2.21 1.88 V V VOL Low Level Output Voltage (Note 7) V+ = 5.5V IOL = 1mA IOL = 16mA l l 0.02 0.26 0.04 0.54 V V V+ = 3.3V IOL = 1mA IOL = 10mA l l 0.03 0.22 0.05 0.46 V V V+ = 2.25V IOL = 1mA IOL = 8mA l l 0.03 0.26 0.07 0.54 V V tPD Output Disable Propagation Delay V+ = 5.5V V+ = 3.3V V+ = 2.25V 17 26 44 ns ns ns tENABLE Output Enable Time NDIV ≤ 2, tOUT = 1/fOUT NDIV ≥ 4, tMASTER = tOUT/NDIV tPD to tOUT tPD to 2•tMASTER μs μs tr Output Rise Time (Note 8) V+ = 5.5V V+ = 3.3V V+ = 2.25V 1.1 1.7 2.7 ns ns ns tf Output Fall Time (Note 8) V+ = 5.5V V+ = 3.3V V+ = 2.25V 1.0 1.6 2.4 ns ns ns |
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