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LTC4361CDC-1-TRPBF Datasheet(PDF) 8 Page - Linear Technology |
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LTC4361CDC-1-TRPBF Datasheet(HTML) 8 Page - Linear Technology |
8 / 16 page LTC4361-1/LTC4361-2 8 436112f The typical LTC4361 application protects 2.5V to 5.5V systems in portable devices from power supply overvolt- age. The basic application circuit is shown in Figure 1. Device operation and external component selection is discussed in detail in the following sections. APPLICATIONS INFORMATION Figure 1. Protection from Input Overvoltage and Overcurrent GATE M1 Si1470DH RSENSE 0.025Ω SENSE IN 436112 F01 VOUT 5V 1.5A VIN 5V LTC4361 OUT PWRGD ON GND COUT 10μF The GATE ramp rate is limited to 3V/ms. VOUT follows at a similar rate which results in an inrush current into the load capacitor COUT of: IINRUSH = COUT • dVGATE dt = COUT •3 mA/µF [] The servo loop is compensated by the parasitic capaci- tance of the external MOSFET. No further compensation components are normally required. In the case where the parasitic capacitance is less than 100pF, a 100pF compensation capacitor between GATE and ground may be required. An even slower GATE ramp and lower inrush current can be achieved by connecting an external capacitor, CG, from GATE to ground. The voltage at GATE then ramps up with a slope equal to 10μA/CG [V/s]. Choose CG using the formula: CG = 10µA IINRUSH •COUT Overvoltage When power is first applied, VIN must remain below 5.7V (VIN(OV) – ΔVOV) for more than 130ms before GATE is ramped up to turn on the MOSFET. If VIN then rises above 5.8V (VIN(OV)), the overvoltage comparator activates the 30mA fast pull-down on GATE within 1μs. After an over- voltage condition, the MOSFET is held off until VIN once again remains below 5.7V for 130ms. Overcurrent The overcurrent comparator protects the MOSFET from excessive current. It trips when the SENSE pin falls more than 50mV below IN for more than 10μs. When the overcur- rent comparator trips, GATE is pulled low quickly and the PWRGDpull-downreleases.TheLTC4361-2automatically tries to apply power again after a 130ms start-up delay. Start-Up When VIN is less than the undervoltage lockout level of 2.1V, the GATE driver is held low and the PWRGD pull-down is high impedance. When VIN rises above 2.1V and ON is held low, a 130ms delay cycle starts. Any undervoltage or overvoltage event at IN (VIN < 2.1V or VIN > 5.7V) restarts the delay cycle. This delay allows the N-channel MOSFET to isolate the output from any input transients that occur at start-up. When the delay cycle completes, GATE starts its slow ramp-up. GATE Control An internal charge pump enhances the external N-channel MOSFET with 6V from GATE to OUT. This allows the use of logic-level N-channel MOSFETs. An internal 6V clamp between GATE and OUT protects the MOSFET gate. |
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Similar Description - LTC4361CDC-1-TRPBF |
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