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C8051F987 Datasheet(PDF) 1 Page - Silicon Laboratories |
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C8051F987 Datasheet(HTML) 1 Page - Silicon Laboratories |
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1 / 2 page  Ultra Low-Power MCU Copyright © 2010 by Silicon Laboratories 5.18.2010 Port 0 Drivers Digital Peripherals UART Timers 0, 1, 2, 3 PCA/ WDT SMBus Priority Crossbar Decoder P0.0/VREF P0.1/AGND P0.2/XTAL1 P0.3/XTAL2 P0.4/TX P0.5/RX P0.6/CNVSTR P0.7/IREF0 Crossbar Control Port I/O Configuration CIP-51 8051 Controller Core 8 kB ISP Flash Program Memory 256 Byte SRAM SFR Bus 256 Byte XRAM Port 1 Drivers P1.0/CP0+ P1.1/CP0- P1.2 P1.3 P1.4 P1.5 SPI Analog Peripherals Comparator + - VDD XTAL1 SYSCLK System Clock Configuration External Oscillator Circuit Precision 24.5 MHz Oscillator Debug / Programming Hardware Power On Reset/PMU Reset C2D C2CK/RST Wake 12-bit ADC A M U X Temp Sensor External VREF Internal VREF VDD XTAL2 Low Power 20 MHz Oscillator 6-bit IREF VREF GND P1.6/XTAL3 IREF0 CP0 SmaRTClock Oscillator XTAL3 XTAL4 GND VREG Digital Power CRC Engine P1.7/XTAL4 Port 2 Drivers P2.7/C2D P1.0 P1.1 C8051F98x Ultra Low Power, High-Performance MCU Ultra-Low Power - 150 µA/MHz active current from 1.8–3.6 V @ 25 MHz - 10 nA sleep current with data retention; BOD disabled - 50 nA sleep current with data retention; BOD enabled - 300 nA sleep current with smaRTClock (internal oscillator) - 600 nA sleep current with smaRTClock (external crystal) - 2 µs wake up from sleep - 1.5 µs analog settling time Supply Voltage 1.8 to 3.6 V - Built-in brown-out detector - On-chip LDO regulator for core supply Analog to Digital Converter - 75 ksps with 12-bit resolution - 300 ksps with 10-bit resolution - 330 ksps with 8-bit resolution - Up to 10-channels - Autonomous burst mode with 16-bit averaging accumulator - VREF from external pin, VDD, or internal regulator - Built-in temperature sensor Internal 6-Bit Current Reference - 2 ranges: source or sink capability - Enhanced resolution via PWM interpolation Comparator - Programmable hysteresis and response time - Configurable as interrupt or reset source - Low current (< 0.4 µA) Development Kit: C8051F996DK High-Speed 8051 µC Core - Pipe-lined instruction architecture; executes 70% of instructions in 1 or 2 system clocks - 25 MIPS peak throughput with 25 MHz clock - Expanded interrupt handler Memory - 512 bytes internal data RAM (256 + 256) - Up to 8 kB Flash; In-system programmable in 512 byte sectors; Full read/write/erase functionality over the entire supply range On-Chip Debug - On-chip debug circuitry facilitates full speed, non-intrusive in- system debug Digital Peripherals - Up to 17 port I/O; Programmable drive strength - Hardware enhanced UART, SPI and SMBus™ serial ports - CRC block provides 16-Bit CCITT polynomial calculation - Four general purpose 16-bit counter/timers - 16-bit programmable counter array (PCA) with three capture/ compare modules and enhanced PWM functionality Clock Sources - 24.5 MHz ±2% oscillator; supports crystal-less UART operation - Low power internal oscillator: 20 MHz - External oscillator: Crystal, RC, C, CMOS clock - Can switch clock sources on-the-fly; useful for power saving modes Temperature Range: -40 to +85 °C Package Options - 24-pin QFN (4x4 mm), RoHS compliant - 24-pin QSOP (easy to hand solder) RoHS compliant - 20-pin QFN (3x3 mm), RoHS compliant |
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