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LTC2393HLX-16 Datasheet(PDF) 8 Page - Linear Technology |
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LTC2393HLX-16 Datasheet(HTML) 8 Page - Linear Technology |
8 / 24 page LTC2393-16 8 239316f PIN FUNCTIONS GND (Pins 1, 5, 7, 20, 35, 41, 44, 48, Exposed Pad Pin 49 (QFN Only)): Ground. All GND pins must be con- nected to a solid ground plane. Exposed pad must be soldered directly to the ground plane. AVP (Pins 2, 40, 45, 46, 47): 5V Analog Power Supply. The range of AVP is 4.75V to 5.25V. Bypass AVP to GND with a good quality 0.1μF and a 10μF ceramic capacitor in parallel. DVP (Pins 3, 19): 5V Digital Power Supply. The range of DVP is 4.75V to 5.25V. Bypass DVP to GND with a good quality 0.1μF and a 10μF ceramic capacitor in parallel. SER/PAR (Pin 4): Serial/Parallel Selection Input. This pin controls the digital interface. A logic high on this pin se- lects the serial interface and a logic low selects the parallel interface. In the serial mode the non-active digital outputs are high impedance. OB/2C (Pin 6): Offset Binary/Two’s Complement Input. When OB/2C is high, the digital output is offset binary. When low, the MSB is inverted resulting in two’s comple- ment output. BYTESWAP (Pin 8): BYTESWAP Input. With BYTESWAP low, data will be output with Pin 28 (D15) being the MSB and Pin 9 (D0) being the LSB. With BYTESWAP high, the upper eight bits and the lower eight bits will be switched. The MSB is output on Pin 16 and Bit 8 is output on Pin 9. Bit 7 is output on Pin 28 and the LSB is output on Pin 21. D0 (Pin 9): Data Bit 0. When SER/PAR = 0 this pin is Bit 0 of the parallel port data output bus. D1 (Pin 10): Data Bit 1. When SER/PAR = 0 this pin is Bit 1 of the parallel port data output bus. D2 (Pin 11): Data Bit 2. When SER/PAR = 0 this pin is Bit 2 of the parallel port data output bus. D3 (Pin 12): Data Bit 3. When SER/PAR = 0 this pin is Bit 3 of the parallel port data output bus. D4 (Pin 13): Data Bit 4. When SER/PAR = 0 this pin is Bit 4 of the parallel port data output bus. D5 (Pin 14): Data Bit 5. When SER/PAR = 0 this pin is Bit 5 of the parallel port data output bus. D6 (Pin 15): Data Bit 6. When SER/PAR = 0 this pin is Bit 6 of the parallel port data output bus. D7 (Pin 16): Data Bit 7. When SER/PAR = 0 this pin is Bit 7 of the parallel port data output bus. OGND (Pin 17): Digital Ground for the Input/Output Interface. OVP (Pin 18): Digital Power Supply for the Input/Output Interface. The range for OVP is 1.8V to 5V. Bypass OVP to OGND with a good quality 4.7μF ceramic capacitor close to the pin. D8 (Pin 21): Data Bit 8. When SER/PAR = 0 this pin is Bit 8 of the parallel port data output bus. D9/SDIN (Pin 22): Data Bit 9/Serial Data Input. When SER/PAR = 0 this pin is Bit 9 of the parallel port data output bus. When SER/PAR = 1, (serial mode) this is the serial data input. SDIN can be used as a data input to daisy-chain two or more conversion results into a single SDOUT line. The digital data level on SDIN is output on SDOUT with a delay of 16 SCLK periods after the start of the read sequence. D10/SDOUT (Pin 23): Data Bit 10/Serial Data Ouput. When SER/PAR = 0 this pin is Bit 10 of the parallel port data output bus. When SER/PAR = 1, (serial mode) this is the serial data output. The conversion result can be clocked out serially on this pin synchronized to SCLK. The data is clocked out MSB first on the rising edge of SCLK and is valid on the falling edge of SCLK. The data format is determined by the logic level of OB/2C. D11/SCLK (Pin 24): Data Bit 11/Serial Clock Input. When SER/PAR = 0 this pin is Bit 11 of the parallel port data output bus. When SER/PAR = 1, (serial mode) this is the serial clock input. D12 (Pin 25): Data Bit 12. When SER/PAR = 0 this pin is Bit 12 of the parallel port data output bus. D13 (Pin 26): Data Bit 13. When SER/PAR = 0 this pin is Bit 13 of the parallel port data output bus. D14 (Pin 27): Data Bit 14. When SER/PAR = 0 this pin is Bit 14 of the parallel port data output bus. |
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