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LTC2393CUK-16PBF Datasheet(PDF) 11 Page - Linear Technology |
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LTC2393CUK-16PBF Datasheet(HTML) 11 Page - Linear Technology |
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11 / 24 page  LTC2393-16 11 239316f APPLICATIONS INFORMATION OVERVIEW The LTC2393-16 is a low noise, high speed 16-bit suc- cessive approximation register (SAR) ADC. Operating from a single 5V supply, the LTC2393-16 supports a large ±4.096V fully differential input range, making it ideal for high performance applications which require a wide dynamic range. The LTC2393-16 achieves ±2LSB INL max, no missing codes at 16 bits and 94.2dB SNR (typ). The LTC2393-16 includes a precision internal reference with a guaranteed 0.5% initial accuracy and a ±20ppm/°C (max) temperature coefficient. Fast 1Msps throughput with no cycle latency in both parallel and serial interface modes makes the LTC2393-16 ideally suited for a wide variety of high speed applications. An internal oscillator sets the conversion time, easing external timing considerations. The LTC2393-16 dissipates only 140mW at 1Msps, while both nap and sleep power-down modes are provided to further reduce power during inactive periods. CONVERTER OPERATION The LTC2393-16 operates in two phases. During the ac- quisition phase, the charge redistribution capacitor D/A converter (CDAC) is connected to the IN+ and IN– pins to sample the differential analog input voltage. A falling edge on the CNVST pin initiates a conversion. During the conversion phase, the 16-bit CDAC is sequenced through a successive approximation algorithm, effectively comparing the sampled input with binary-weighted fractions of the reference voltage (e.g., VREF/2, VREF/4 … VREF/65536) using the differential comparator. At the end of conversion, the CDAC output approximates the sampled analog input. The ADC control logic then prepares the 16-bit digital output code for parallel or serial transfer. TRANSFER FUNCTION The LTC2393-16 digitizes the full-scale voltage of 2 • VREF into 216 levels, resulting in an LSB size of 125μV when VREF = 4.096V. The ideal transfer function for two’s complement is shown in Figure 2. The OB/2C pin selects either offset binary or two’s complement format. ANALOG INPUT The analog inputs of the LTC2393-16 are fully differential in order to maximize the signal swing that can be digitized. The analog inputs can be modeled by the equivalent circuit shown in Figure 3. The diodes at the input provide ESD pro- tection. The analog inputs should not exceed the supply or go below ground. In the acquisition phase, each input sees approximately 40pF (CIN)fromthesamplingCDACinseries with 50Ω (RIN) from the on-resistance of the sampling switch. Any unwanted signal that is common to both inputs will be reduced by the common mode rejection of the ADC. The inputs draw only one small current spike while charging the CIN capacitors during acquisition. During conversion, the analog inputs draw only a small leakage current. Figure 2. LTC2393-16 Two’s Complement Transfer Function Figure 3. The Equivalent Circuit for the Differential Analog Input of the LTC2393-16 INPUT VOLTAGE (V) 0V –1 LSB 239316 F02 011...111 011...110 000...001 000...000 100...000 100...001 111...110 1 LSB BIPOLAR ZERO 111...111 FSR/2 – 1LSB –FSR/2 FSR = +FS – –FS 1LSB = FSR/65536 IN+ RIN CIN AVP AVP BIAS VOLTAGE IN– RIN 239316 F03 CIN |
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