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AS1520/AS1521

9 Application Information

Initialization

When power is first applied to the AS1520/AS1521 internal power-on reset circuitry sets the devices for normal opera-

tion. At this point, the devices can perform data conversions with CSN held low.

Note:

The device requires 10µs after the power supplies stabilize; no conversions should be initiated during this time.

The digital output at pin DOUT will be all 0s until an analog-to-digital conversion is initiated.

Serial Interface

The AS1520/AS1521 fully support SPI, QSPI, and Microwire interfaces. For SPI, select the correct clock polarity and

sampling edge in the SPI control registers (set CPOL = 0 and CPHA = 0).

Note:

Microwire, SPI, and QSPI all transmit a byte and receive a byte at the same time.

Using the circuit shown in Figure 33 on page 24, the simplest software interface requires only three 8-bit transfers to

perform a conversion (one 8-bit transfer to configure the AS1520/AS1521, and two more 8-bit transfers to clock out the

10-bit conversion result).

Serial Interface Configuration

The following steps describe how to configure the serial interface:

1. Confirm that the CPU serial interface is in master mode (so the CPU generates the serial clock).

2. Choose a clock frequency from 500kHz to 6.4MHz (AS1520) or 4.8MHz (AS1521).

3. Set up the control byte and call it TB1. TB1 should be in the format 1XXXXXXX binary, where the Xs indicate the

selected channel, conversion mode, and power mode.

4. Use a general-purpose I/O line on the CPU to pull CSN low.

5. Transmit TB1 and simultaneously receive a byte (RB1). Ignore this byte.

8. Pull CSN high.

Bytes RB2 and RB3 (see Figure 21 on page 17) contain the results of the conversion, padded with three leading zeros

and one trailing zero. The total conversion time is a function of the serial-clock frequency and the amount of idle time

between 8-bit transfers. To avoid excessive track/hold droop, make sure the total conversion time does not exceed

120µs.