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PIC18LF26J53 Datasheet(PDF) 14 Page - Microchip Technology |
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PIC18LF26J53 Datasheet(HTML) 14 Page - Microchip Technology |
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14 / 586 page 
PIC18F47J53 FAMILY DS39964B-page 14 Preliminary 2010 Microchip Technology Inc. FIGURE 1-1: PIC18F2XJ53 (28-PIN) BLOCK DIAGRAM Instruction Decode and Control PORTA Data Latch Data Memory (3.8 Kbytes) Address Latch Data Address<12> 12 Access BSR FSR0 FSR1 FSR2 inc/dec logic Address 4 12 4 PCH PCL PCLATH 8 31-Level Stack Program Counter PRODL PRODH 8 x 8 Multiply 8 BITOP 8 8 ALU<8> Address Latch Program Memory (16 Kbytes-64 Kbytes) Data Latch 20 8 8 Table Pointer<21> inc/dec logic 21 8 Data Bus<8> Table Latch 8 IR 12 3 PCLATU PCU Note 1: See Table 1-3 for I/O port pin descriptions. 2: BOR functionality is provided when the on-board voltage regulator is enabled. EUSART1 Comparators MSSP1 Timer2 Timer1 Timer3 Timer0 ADC W Instruction Bus <16> STKPTR Bank 8 State Machine Control Signals Decode 8 8 EUSART2 ROM Latch MSSP2 PORTC RA0:RA7(1) RC0:RC7(1) PORTB RB0:RB7(1) Timer4 OSC1/CLKI OSC2/CLKO VDD, 8 MHz INTOSC VSS MCLR Power-up Timer Oscillator Start-up Timer Power-on Reset Watchdog Timer Brown-out Reset(2) Precision Reference Band Gap INTRC Oscillator Regulator Voltage VDDCORE/VCAP CTMU Timing Generation USB Module VUSB HLVD RTCC ECCP1 ECCP2 ECCP3 CCP4 CCP5 CCP6 CCP7 CCP8 CCP9 CCP10 USB Timer5 Timer6 Timer8 |
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