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PIC18LF26J53 Datasheet(PDF) 63 Page - Microchip Technology |
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PIC18LF26J53 Datasheet(HTML) 63 Page - Microchip Technology |
63 / 586 page 2010 Microchip Technology Inc. Preliminary DS39964B-page 63 PIC18F47J53 FAMILY A series resistor between RA0 and the external capacitor provides overcurrent protection for the RA0/AN0/C1INA/ULPWU/RP0 pin and can allow for software calibration of the time-out (see Figure 4-9). FIGURE 4-9: SERIAL RESISTOR A timer can be used to measure the charge time and discharge time of the capacitor. The charge time can then be adjusted to provide the desired interrupt delay. This technique will compensate for the affects of temperature, voltage and component accuracy. The ULPWU peripheral can also be configured as a simple Programmable Low-Voltage Detect (LVD) or temperature sensor. 4.8 Peripheral Module Disable All peripheral modules (except for I/O ports) also have a second control bit that can disable their functionality. These bits, known as the Peripheral Module Disable (PMDISx) bits, are generically named “xxxMD” (using “xxx” as the mnemonic version of the module’s name). These bits are located in the PMDISx special function registers. In contrast to the module enable bits (gener- ically named “xxxEN” and located in bit position seven of the control registers), the PMDISx bits must be set (= 1) to disable the modules. While the PMD and module enable bits both disable a peripheral’s functionality, the PMD bit completely shuts down the peripheral, effectively powering down all circuits and removing all clock sources. This has the additional effect of making any of the module’s control and buffer registers, mapped in the SFR space, unavailable for operations. Essentially, the peripheral ceases to exist until the PMD bit is cleared. This differs from using the module enable bit, which allows the peripheral to be reconfigured and buffer reg- isters preloaded, even when the peripheral’s operations are disabled. The PMDISx bits are most useful in highly power-sensitive applications. In these cases, the bits can be set before the main body of the application to remove peripherals that will not be needed at all. Note: For more information, refer to AN879, “Using the Microchip Ultra Low-Power Wake-up Module” application note (DS00879). R1 C1 RA0 TABLE 4-2: LOW-POWER MODE REGISTERS Register Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Value on POR, BOR PMDIS3 CCP10MD CCP9MD CCP8MD CCP7MD CCP6MD CCP5MD CCP4MD — 0000 000– PMDIS2 —TMR8MD — TMR6MD TMR5MD CMP3MD CMP2MD CMP1MD –0–0 0000 PMDIS1 PSPMD(1) CTMUMD RTCCMD TMR4MD TMR3MD TMR2MD TMR1MD — 0000 000– PMDIS0 ECCP3MD ECCP2MD ECCP1MD UART2MD UART1MD SPI2MD SPI1MD ADCMD 0000 0000 Note 1: Not implemented on 28-pin devices (PIC18F26J53, PIC18F27J53, PIC18LF26J53 and PIC18LF27J53). |
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