Electronic Components Datasheet Search
  English  ▼

Delete All
ON OFF
ALLDATASHEET.COM

X  

Preview PDF HTML

PIC18LF26J53 Datasheet(PDF) 46 Page - Microchip Technology

Part No. PIC18LF26J53
Description  28/44-Pin, High-Performance USB Microcontrollers with nanoWatt XLP Technology
Download  586 Pages
Scroll/Zoom Zoom In 100% Zoom Out
Maker  MICROCHIP [Microchip Technology]
Homepage  http://www.microchip.com
Logo 

PIC18LF26J53 Datasheet(HTML) 46 Page - Microchip Technology

Zoom Inzoom in Zoom Outzoom out
 46 / 586 page
background image
PIC18F47J53 FAMILY
DS39964B-page 46
Preliminary
 2010 Microchip Technology Inc.
3.7
Effects of Power-Managed Modes
on Various Clock Sources
When the PRI_IDLE mode is selected, the designated
primary oscillator continues to run without interruption.
For all other power-managed modes, the oscillator
using the OSC1 pin is disabled. Unless the USB
module is enabled, the OSC1 pin (and OSC2 pin if
used by the oscillator) will stop oscillating.
In
secondary
clock
modes
(SEC_RUN
and
SEC_IDLE), the Timer1 oscillator is operating and
providing the device clock. The Timer1 oscillator may
also run in all power-managed modes if required to
clock Timer1 or Timer3.
In internal oscillator modes (RC_RUN and RC_IDLE),
the internal oscillator block provides the device clock
source. The 31 kHz INTRC output can be used directly
to provide the clock and may be enabled to support
various
special
features
regardless
of
the
power-managed mode (see Section 28.2 “Watchdog
Timer (WDT)”, Section 28.4 “Two-Speed Start-up”
and Section 28.5 “Fail-Safe Clock Monitor” for more
information on WDT, FSCM and Two-Speed Start-up).
The INTOSC output at 8 MHz may be used directly to
clock the device or may be divided down by the post-
scaler. The INTOSC output is disabled if the clock is
provided directly from the INTRC output.
If Sleep mode is selected, all clock sources which are
no longer required are stopped. Since all the transistor
switching currents have been stopped, Sleep mode
achieves the lowest current consumption of the device
(only leakage currents) outside of Deep Sleep.
Sleep mode should not be invoked while the USB
module is enabled and operating in Full-Power mode.
Before Sleep mode is selected, the USB module should
be put in the suspend state. This is accomplished by
setting the SUSPND bit in the UCON register.
Enabling any on-chip feature that will operate during
Sleep mode increases the current consumed during
Sleep mode. The INTRC is required to support WDT
operation. The Timer1 oscillator may be operating to
support an RTC. Other features may be operating that
do not require a device clock source (i.e., MSSP slave,
PMP, INTx pins, etc.). Peripherals that may add
significant
current
consumption
are
listed
in
Section 31.2 “DC Characteristics: Power-Down and
Supply Current PIC18F47J53 Family (Industrial)”.
3.8
Power-up Delays
Power-up delays are controlled by two timers so that no
external Reset circuitry is required for most applica-
tions. The delays ensure that the device is kept in
Reset until the device power supply is stable under
normal circumstances and the primary clock is operat-
ing and stable. For additional information on power-up
delays, see Section 5.6 “Power-up Timer (PWRT)”.
The first timer is the Power-up Timer (PWRT), which
provides a fixed delay on power-up (parameter 33,
Table 31-14).
The second timer is the Oscillator Start-up Timer
(OST), intended to keep the chip in Reset until the
crystal oscillator is stable (HS mode). The OST does
this by counting 1024 oscillator cycles before allowing
the oscillator to clock the device.
There is a delay of interval, TCSD (parameter 38,
Table 31-14), following POR, while the controller
becomes ready to execute instructions. This delay runs
concurrently with any other delays. This may be the only
delay that occurs when any of the internal oscillator or
EC modes are used as the primary clock source.


Html Pages

1  2  3  4  5  6  7  8  9  10  11  12  13  14  15  16  17  18  19  20  21  22  23  24  25  26  27  28  29  30  31  32  33  34  35  36  37  38  39  40  41  42  43  44  45  46  47  48  49  50  51  52  53  54  55  56  57  58  59  60  61  62  63  64  65  66  67  68  69  70  71  72  73  74  75  76  77  78  79  80  81  82  83  84  85  86  87  88  89  90  91  92  93  94  95  96  97  98  99  100   ...More


Datasheet Download




Link URL




Privacy Policy
ALLDATASHEET.COM
Does ALLDATASHEET help your business so far?  [ DONATE ]  

About Alldatasheet   |   Advertisement   |   Datasheet Upload   |   Contact us   |   Privacy Policy   |   Alldatasheet API   |   Link Exchange   |   Manufacturer List
All Rights Reserved© Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn