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PIC18LF26J53 Datasheet(PDF) 45 Page - Microchip Technology

Part No. PIC18LF26J53
Description  28/44-Pin, High-Performance USB Microcontrollers with nanoWatt XLP Technology
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Maker  MICROCHIP [Microchip Technology]
Homepage  http://www.microchip.com
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PIC18LF26J53 Datasheet(HTML) 45 Page - Microchip Technology

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 2010 Microchip Technology Inc.
Preliminary
DS39964B-page 45
PIC18F47J53 FAMILY
3.6
Reference Clock Output
In addition to the peripheral clock/4 output in certain
oscillator modes, the device clock in the PIC18F47J53
family can also be configured to provide a reference
clock output signal to a port pin. This feature is avail-
able in all oscillator configurations and allows the user
to select a greater range of clock submultiples to drive
external devices in the application.
This reference clock output is controlled by the
REFOCON register (Register 3-4). Setting the ROON
bit (REFOCON<7>) makes the clock signal available
on the REFO (RB2) pin. The RODIV<3:0> bits enable
the selection of 16 different clock divider options.
The ROSSLP and ROSEL bits (REFOCON<5:4>)
control the availability of the reference output during
Sleep mode. The ROSEL bit determines if the oscillator
is on OSC1 and OSC2, or the current system clock
source is used for the reference clock output. The
ROSSLP bit determines if the reference source is
available on RB2 when the device is in Sleep mode.
To use the reference clock output in Sleep mode, both
the ROSSLP and ROSEL bits must be set. The device
clock must also be configured for an EC or HS mode;
otherwise, the oscillator on OSC1 and OSC2 will be
powered down when the device enters Sleep mode.
Clearing the ROSEL bit allows the reference output
frequency to change as the system clock changes
during any clock switches.
REGISTER 3-4:
REFOCON: REFERENCE OSCILLATOR CONTROL REGISTER (BANKED F3Dh)
R/W-0
U-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
ROON
ROSSLP
ROSEL
RODIV3
RODIV2
RODIV1
RODIV0
bit 7
bit 0
Legend:
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
-n = Value at POR
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown
bit 7
ROON: Reference Oscillator Output Enable bit
1 = Reference oscillator is enabled on REFO pin
0 = Reference oscillator is disabled
bit 6
Unimplemented: Read as ‘0’
bit 5
ROSSLP: Reference Oscillator Output Stop in Sleep bit
1 = Reference oscillator continues to run in Sleep
0 = Reference oscillator is disabled in Sleep
bit 4
ROSEL: Reference Oscillator Source Select bit
1 = Primary oscillator crystal/resonator is used as the base clock(1)
0 = System clock (FOSC) is used as the base clock; the base clock reflects any clock switching of the device
bit 3-0
RODIV<3:0>: Reference Oscillator Divisor Select bits
1111 = Base clock value divided by 32,768
1110 = Base clock value divided by 16,384
1101 = Base clock value divided by 8,192
1100 = Base clock value divided by 4,096
1011 = Base clock value divided by 2,048
1010 = Base clock value divided by 1,024
1001 = Base clock value divided by 512
1000 = Base clock value divided by 256
0111 = Base clock value divided by 128
0110 = Base clock value divided by 64
0101 = Base clock value divided by 32
0100 = Base clock value divided by 16
0011 = Base clock value divided by 8
0010 = Base clock value divided by 4
0001 = Base clock value divided by 2
0000 = Base clock value
Note 1:
The crystal oscillator must be enabled using the FOSC<2:0> bits; the crystal maintains the operation in
Sleep mode.


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