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PIC18LF26J53 Datasheet(PDF) 25 Page - Microchip Technology |
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PIC18LF26J53 Datasheet(HTML) 25 Page - Microchip Technology |
25 / 586 page ![]() 2010 Microchip Technology Inc. Preliminary DS39964B-page 25 PIC18F47J53 FAMILY PORTB (continued) RB4/CCP4/PMA1/KBI0/SCK1/ SCL1/RP7 RB4 CCP4(2) PMA1(2) KBI0 SCK1 SCL1 RP7 14(3) 14(3) I/O I/O I/O I I/O I/O I/O TTL/DIG ST/DIG ST/TTL/ DIG TTL ST/DIG I2C ST/DIG Digital I/O. Capture/Compare/PWM input/output. Parallel Master Port address. Interrupt-on-change pin. Synchronous serial clock input/output. I2C clock input/output. Remappable Peripheral Pin 7 input/output. RB5/CCP5/PMA0/KBI1/SDI1/ SDA1/RP8 RB5 CCP5 PMA0(2) KBI1 SDI1 SDA1 RP8 15(3) 15(3) I/O I/O I/O I I I/O I/O TTL/DIG ST/DIG ST/TTL/ DIG TTL ST I2C ST/DIG Digital I/O. Capture/Compare/PWM input/output. Parallel Master Port address. Interrupt-on-change pin. SPI data input. I2C™ data input/output. Remappable Peripheral Pin 8 input/output. RB6/CCP6/KBI2/PGC/RP9 RB6 CCP6 KBI2 PGC RP9 16(3) 16(3) I/O I/O I I I/O TTL/DIG ST/DIG TTL ST ST/DIG Digital I/O. Capture/Compare/PWM input/output. Interrupt-on-change pin. ICSP™ clock input. Remappable Peripheral Pin 9 input/output. RB7/CCP7/KBI3/PGD/RP10 RB7 CCP7 KBI3 PGD RP10 17(3) 17(3) I/O I/O I I/O I/O TTL/DIG ST/DIG TTL ST/DIG ST/DIG Digital I/O. Capture/Compare/PWM input/output. Interrupt-on-change pin. In-Circuit Debugger and ICSP programming data pin. Remappable Peripheral Pin 10 input/output. TABLE 1-4: PIC18F4XJ53 PINOUT I/O DESCRIPTIONS (CONTINUED) Pin Name Pin Number Pin Type Buffer Type Description 44- QFN 44- TQFP Legend: TTL = TTL compatible input CMOS = CMOS compatible input or output ST = Schmitt Trigger input with CMOS levels Analog = Analog input I = Input O = Output P = Power OD = Open-Drain (no P diode to VDD) DIG = Digital output I2C™ = Open-Drain, I2C specific Note 1: RA7 and RA6 will be disabled if OSC1 and OSC2 are used for the clock function. 2: Available only on 44-pin devices (PIC18F46J53, PIC18F47J53, PIC18LF46J53 and PIC18LF47J53). 3: 5.5V tolerant. |
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