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24LC128T-E/ST Datasheet(PDF) 4 Page - Microchip Technology |
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24LC128T-E/ST Datasheet(HTML) 4 Page - Microchip Technology |
4 / 38 page 24AA128/24LC128/24FC128 DS21191S-page 4 2010 Microchip Technology Inc. FIGURE 1-1: BUS TIMING DATA 13 TAA Output valid from clock (Note 2) — — — — 3500 900 900 400 ns 1.7V VCC 2.5V 2.5V VCC 5.5V 1.7V VCC 2.5V 24FC128 2.5V VCC 5.5V 24FC128 14 TBUF Bus free time: Time the bus must be free before a new transmission can start 4700 1300 1300 500 — — — — ns 1.7V VCC 2.5V 2.5V VCC 5.5V 1.7V VCC 2.5V 24FC128 2.5V VCC 5.5V 24FC128 15 TOF Output fall time from VIH minimum to VIL maximum CB 100 pF 10 + 0.1CB 250 250 ns All except, 24FC128 (Note 1) 24FC128 (Note 1) 16 TSP Input filter spike suppression (SDA and SCL pins) — 50 ns All except, 24FC128 (Notes 1 and 3) 17 TWC Write cycle time (byte or page) —5 ms — 18 — Endurance 1,000,000 — cycles Page Mode, 25°C, 5.5V (Note 4) TABLE 1-2: AC CHARACTERISTICS (CONTINUED) AC CHARACTERISTICS Electrical Characteristics: Industrial (I): VCC = +1.7V to 5.5V TA = -40°C to +85°C Automotive (E): VCC = +2.5V to 5.5V TA = -40°C to 125°C Param. No. Sym. Characteristic Min. Max. Units Conditions Note 1: Not 100% tested. CB = total capacitance of one bus line in pF. 2: As a transmitter, the device must provide an internal minimum delay time to bridge the undefined region (minimum 300 ns) of the falling edge of SCL to avoid unintended generation of Start or Stop conditions. 3: The combined TSP and VHYS specifications are due to new Schmitt Trigger inputs, which provide improved noise spike suppression. This eliminates the need for a TI specification for standard operation. 4: This parameter is not tested but ensured by characterization. For endurance estimates in a specific application, please consult the Total Endurance™ Model, which can be obtained from Microchip’s web site at www.microchip.com. (unprotected) (protected) SCL SDA IN SDA OUT WP 5 7 6 16 3 2 89 13 D3 4 10 11 12 14 |
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