1024-Bit EEPROM iButton

______________________________________________________________________________________

11

BUS MASTER Tx

TA1 (T[7:0]), TA2 (T[15:8])

APPLICABLE TO ALL R/W

MEMORY LOCATIONS.

*

* 1-Wire IDLE HIGH FOR POWER.

DS1972 COPIES

SCRATCHPAD

DATA TO ADDRESS

BUS MASTER

Rx "1"s

AA = 1

BUS MASTER

Rx "1"s

MASTER Tx RESET?

N

Y

N

N

MASTER Tx RESET?

Y

MASTER Tx RESET?

BUS MASTER Tx

TA1 (T[7:0]), TA2 (T[15:8])

AND E/S BYTE

55h

COPY SCRATCHPAD?

N

Y

Y

Y

N

DS1972 Tx "0"

DS1972 Tx "1"

F0h

READ MEMORY?

N

Y

Y

N

AUTH. CODE

MATCH?

Y

N

Y

N

N

T[15:0] < 0090h?

PF = 0?

ADDRESS < 90h?

Y

COPY PROTECTED?

BUS MASTER

Rx "1"s

MASTER Tx RESET?

N

Y

DS1972 SETS MEMORY

ADDRESS = (T[15:0])

BUS MASTER Rx

DATA BYTE FROM

MEMORY ADDRESS

Y

N

N

MASTER Tx RESET?

ADDRESS < 8Fh?

N

Y

MASTER Tx RESET?

DS1972

INCREMENTS

ADDRESS

COUNTER

Y

TO FIGURE 7a

FROM FIGURE 7a

Figure 7b. Memory Function Flowchart (continued)