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SC68C752BIBS Datasheet(PDF) 2 Page - NXP Semiconductors |
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SC68C752BIBS Datasheet(HTML) 2 Page - NXP Semiconductors |
2 / 48 page SC68C752B_4 © NXP B.V. 2010. All rights reserved. Product data sheet Rev. 04 — 20 January 2010 2 of 48 NXP Semiconductors SC68C752B 5 V, 3.3 V and 2.5 V dual UART, 5 Mbit/s (max.), with 64-byte FIFOs 5 V tolerant on input only pins1 Software selectable baud rate generator Prescaler provides additional divide-by-4 function Industrial temperature range ( −40 °C to +85 °C) Fast data bus access time Programmable Sleep mode Programmable serial interface characteristics 5-bit, 6-bit, 7-bit, or 8-bit characters Even, odd, or no parity bit generation and detection 1, 1.5, or 2 stop bit generation False start bit detection Complete status reporting capabilities in both normal and Sleep mode Line break generation and detection Internal test and loopback capabilities Fully prioritized interrupt system controls Modem control functions (CTS, RTS, DSR, DTR, RI, and CD) 3. Ordering information 1. For data bus pins D7 to D0, see Table 25 “Limiting values”. Table 1. Ordering information Type number Package Name Description Version SC68C752BIB48 LQFP48 plastic low profile quad flat package; 48 leads; body 7 × 7 × 1.4 mm SOT313-2 SC68C752BIBS HVQFN32 plastic thermal enhanced very thin quad flat package; no leads; 32 terminals; body 5 × 5 × 0.85 mm SOT617-1 |
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