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SC16IS752 Datasheet(PDF) 29 Page - NXP Semiconductors

Part No. SC16IS752
Description  Dual UART with I2C-bus/SPI interface, 64 bytes of transmit and receive FIFOs, IrDA SIR built-in support
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Manufacturer  NXP [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo NXP - NXP Semiconductors

SC16IS752 Datasheet(HTML) 29 Page - NXP Semiconductors

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SC16IS752_SC16IS762_7
© NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 07 — 19 May 2008
29 of 59
NXP Semiconductors
SC16IS752/SC16IS762
Dual UART with I2C-bus/SPI interface, 64-byte FIFOs, IrDA SIR
8.11 Transmission Control Register (TCR)
This 8-bit register is used to store the RX FIFO threshold levels to stop/start transmission
during hardware/software flow control. Table 22 shows Transmission Control Register bit
settings. If TCR bits are cleared, then selectable trigger levels in FCR are used in place of
TCR.
TCR trigger levels are available from 0 bytes to 60 characters with a granularity of four.
Remark: TCR can only be written to when EFR[4] = logic 1 and MCR[2] = logic 1. The
programmer must program the TCR such that TCR[3:0] > TCR[7:4]. There is no built-in
hardware check to make sure this condition is met. Also, the TCR must be programmed
with this condition before Auto-RTS or software flow control is enabled to avoid spurious
operation of the device.
8.12 Trigger Level Register (TLR)
This 8-bit register is used to store the transmit and received FIFO trigger levels used for
interrupt generation. Trigger levels from 4 to 60 can be programmed with a granularity
of four. Table 23 shows Trigger Level Register bit settings.
Remark: TLR can only be written to when EFR[4] = logic 1 and MCR[2] = logic 1. If
TLR[3:0] or TLR[7:4] are logical 0, the selectable trigger levels via the FIFO Control
Register (FCR) are used for the transmit and receive FIFO trigger levels. Trigger levels
from 4 characters to 60 characters are available with a granularity of four. The TLR should
be programmed for N
4, where N is the desired trigger level.
When the trigger level setting in TLR is zero, the SC16IS752/SC16IS762 uses the trigger
level setting defined in FCR. If TLR has non-zero trigger level value, the trigger level
defined in FCR is discarded. This applies to both transmit FIFO and receive FIFO trigger
level setting.
When TLR is used for RX trigger level control, FCR[7:6] should be left at the default state
‘00’.
Table 22.
Transmission Control Register bits description
Bit
Symbol
Description
7:4
TCR[7:4]
RX FIFO trigger level to resume
3:0
TCR[3:0]
RX FIFO trigger level to halt transmission
Table 23.
Trigger Level Register bits description
Bit
Symbol
Description
7:4
TLR[7:4]
RX FIFO trigger levels (4 to 60), number of characters available
3:0
TLR[3:0]
TX FIFO trigger levels (4 to 60), number of spaces available


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