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SC16IS752 Datasheet(PDF) 22 Page - NXP Semiconductors

Part No. SC16IS752
Description  Dual UART with I2C-bus/SPI interface, 64 bytes of transmit and receive FIFOs, IrDA SIR built-in support
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Manufacturer  NXP [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo NXP - NXP Semiconductors

SC16IS752 Datasheet(HTML) 22 Page - NXP Semiconductors

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SC16IS752_SC16IS762_7
© NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 07 — 19 May 2008
22 of 59
NXP Semiconductors
SC16IS752/SC16IS762
Dual UART with I2C-bus/SPI interface, 64-byte FIFOs, IrDA SIR
8.1 Receive Holding Register (RHR)
The receiver section consists of the Receive Holding Register (RHR) and the Receive
Shift Register (RSR). The RHR is actually a 64-byte FIFO. The RSR receives serial data
from the RX terminal. The data is converted to parallel data and moved to the RHR. The
receiver section is controlled by the Line Control Register. If the FIFO is disabled, location
zero of the FIFO is used to store the characters.
8.2 Transmit Holding Register (THR)
The transmitter section consists of the Transmit Holding Register (THR) and the Transmit
Shift Register (TSR). The THR is actually a 64-byte FIFO. The THR receives data and
shifts it into the TSR, where it is converted to serial data and moved out on the TX
terminal. If the FIFO is disabled, location zero of the FIFO is used to store the byte.
Characters are lost if overflow occurs.
8.3 Interrupt Enable Register (IER)
The Interrupt Enable Register (IER) enables each of the six types of interrupt, receiver
error, RHR interrupt, THR interrupt, Modem Status, Xoff received, or CTS/RTS change of
state from LOW to HIGH. The IRQ output signal is activated in response to interrupt
generation. Table 11 shows Interrupt Enable Register bit settings.
Table 11.
Interrupt Enable Register bits description
Bit
Symbol
Description
7
IER[7][1]
CTS interrupt enable.
logic 0 = disable the CTS interrupt (normal default condition)
logic 1 = enable the CTS interrupt
6
IER[6][1]
RTS interrupt enable.
logic 0 = disable the RTS interrupt (normal default condition)
logic 1 = enable the RTS interrupt
5
IER[5][1]
Xoff interrupt.
logic 0 = disable the Xoff interrupt (normal default condition)
logic 1 = enable the Xoff interrupt
4
IER[4][1]
Sleep mode.
logic 0 = disable Sleep mode (normal default condition)
logic 1 = enable Sleep mode. See Section 7.6 “Sleep mode” for details.
3
IER[3]
Modem Status interrupt.
logic 0 = disable the Modem Status Register interrupt (normal default
condition)
logic 1 = enable the Modem Status Register interrupt
Remark: See IOControl register bit 1 or bit 2 (in Table 29) for the description
of how to program the pins as modem pins.
2
IER[2]
Receive Line Status interrupt.
logic 0 = disable the receiver line status interrupt (normal default condition)
logic 1 = enable the receiver line status interrupt


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