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PSMN038-100K Datasheet(PDF) 2 Page - NXP Semiconductors |
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PSMN038-100K Datasheet(HTML) 2 Page - NXP Semiconductors |
2 / 12 page PSMN038-100K_2 © NXP B.V. 2009. All rights reserved. Product data sheet Rev. 02 — 25 November 2009 2 of 12 NXP Semiconductors PSMN038-100K N-channel TrenchMOS SiliconMAX standard level FET 2. Pinning information 3. Ordering information 4. Limiting values Table 2. Pinning information Pin Symbol Description Simplified outline Graphic symbol 1S source SOT96-1 (SO8) 2S source 3S source 4G gate 5D drain 6D drain 7D drain 8D drain 4 5 1 8 S D G mbb076 Table 3. Ordering information Type number Package Name Description Version PSMN038-100K SO8 plastic small outline package; 8 leads; body width 3.9 mm SOT96-1 Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter Conditions Min Max Unit VDS drain-source voltage Tj ≥ 25 °C; Tj ≤ 150 °C - 100 V VGS gate-source voltage -20 20 V ID drain current Tsp =80 °C; see Figure 1 and 3 -6.3 A IDM peak drain current Tsp =25 °C; tp ≤ 10 µs; pulsed; see Figure 3 -50 A Ptot total power dissipation Tsp =80 °C; see Figure 2 -3.5 W Tstg storage temperature -55 150 °C Tj junction temperature -55 150 °C Source-drain diode IS source current Tsp =80 °C - 3.1 A ISM peak source current Tsp =25 °C; tp ≤ 10 µs; pulsed - 50 A |
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