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LM3S8630-EQN100-A2T Datasheet(PDF) 8 Page - Texas Instruments

Part # LM3S8630-EQN100-A2T
Description  Stellaris짰 LM3S8630 Microcontroller
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

LM3S8630-EQN100-A2T Datasheet(HTML) 8 Page - Texas Instruments

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List of Figures
Figure 1-1.
Stellaris
® LM3S8630 Microcontroller High-Level Block Diagram ............................. 33
Figure 2-1.
CPU Block Diagram ............................................................................................. 41
Figure 2-2.
TPIU Block Diagram ............................................................................................ 42
Figure 5-1.
JTAG Module Block Diagram ................................................................................ 52
Figure 5-2.
Test Access Port State Machine ........................................................................... 55
Figure 5-3.
IDCODE Register Format ..................................................................................... 61
Figure 5-4.
BYPASS Register Format .................................................................................... 61
Figure 5-5.
Boundary Scan Register Format ........................................................................... 62
Figure 6-1.
Basic RST Configuration ...................................................................................... 64
Figure 6-2.
External Circuitry to Extend Power-On Reset ........................................................ 65
Figure 6-3.
Reset Circuit Controlled by Switch ........................................................................ 65
Figure 6-4.
Power Architecture .............................................................................................. 67
Figure 6-5.
Main Clock Tree .................................................................................................. 69
Figure 7-1.
Hibernation Module Block Diagram ..................................................................... 124
Figure 7-2.
Clock Source Using Crystal ................................................................................ 125
Figure 7-3.
Clock Source Using Dedicated Oscillator ............................................................. 126
Figure 8-1.
Flash Block Diagram .......................................................................................... 143
Figure 9-1.
GPIO Port Block Diagram ................................................................................... 169
Figure 9-2.
GPIODATA Write Example ................................................................................. 170
Figure 9-3.
GPIODATA Read Example ................................................................................. 170
Figure 10-1.
GPTM Module Block Diagram ............................................................................ 210
Figure 10-2.
16-Bit Input Edge Count Mode Example .............................................................. 214
Figure 10-3.
16-Bit Input Edge Time Mode Example ............................................................... 215
Figure 10-4.
16-Bit PWM Mode Example ................................................................................ 216
Figure 11-1.
WDT Module Block Diagram .............................................................................. 246
Figure 12-1.
UART Module Block Diagram ............................................................................. 270
Figure 12-2.
UART Character Frame ..................................................................................... 271
Figure 12-3.
IrDA Data Modulation ......................................................................................... 273
Figure 13-1.
SSI Module Block Diagram ................................................................................. 310
Figure 13-2.
TI Synchronous Serial Frame Format (Single Transfer) ........................................ 313
Figure 13-3.
TI Synchronous Serial Frame Format (Continuous Transfer) ................................ 313
Figure 13-4.
Freescale SPI Format (Single Transfer) with SPO=0 and SPH=0 .......................... 314
Figure 13-5.
Freescale SPI Format (Continuous Transfer) with SPO=0 and SPH=0 .................. 314
Figure 13-6.
Freescale SPI Frame Format with SPO=0 and SPH=1 ......................................... 315
Figure 13-7.
Freescale SPI Frame Format (Single Transfer) with SPO=1 and SPH=0 ............... 316
Figure 13-8.
Freescale SPI Frame Format (Continuous Transfer) with SPO=1 and SPH=0 ........ 316
Figure 13-9.
Freescale SPI Frame Format with SPO=1 and SPH=1 ......................................... 317
Figure 13-10. MICROWIRE Frame Format (Single Frame) ........................................................ 318
Figure 13-11. MICROWIRE Frame Format (Continuous Transfer) ............................................. 319
Figure 13-12. MICROWIRE Frame Format, SSIFss Input Setup and Hold Requirements ............ 319
Figure 14-1.
I2C Block Diagram ............................................................................................. 348
Figure 14-2.
I2C Bus Configuration ........................................................................................ 348
Figure 14-3.
START and STOP Conditions ............................................................................. 349
Figure 14-4.
Complete Data Transfer with a 7-Bit Address ....................................................... 349
Figure 14-5.
R/S Bit in First Byte ............................................................................................ 349
April 04, 2010
8
Texas Instruments-Production Data
Table of Contents


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