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PESD24VL2BT Datasheet(PDF) 10 Page - NXP Semiconductors |
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PESD24VL2BT Datasheet(HTML) 10 Page - NXP Semiconductors |
10 / 14 page PESDXL2BT_SER_2 © NXP B.V. 2009. All rights reserved. Product data sheet Rev. 02 — 25 August 2009 10 of 14 NXP Semiconductors PESDxL2BT series Low capacitance double bidirectional ESD protection diodes in SOT23 7. Application information The PESDxL2BT series is designed for the protection of two bidirectional signal lines from the damage caused by ESD and surge pulses. The PESDxL2BT series may be used on lines where the signal polarities are above and below ground. The PESDxL2BT series provides a surge capability of up to 350 W per line for an 8/20 µs waveform. Circuit board layout and protection device placement Circuit board layout is critical for the suppression of ESD, Electrical Fast Transient (EFT) and surge transients. The following guidelines are recommended: 1. Place the PESDxL2BT as close to the input terminal or connector as possible. 2. The path length between the PESDxL2BT and the protected line should be minimized. 3. Keep parallel signal paths to a minimum. 4. Avoid running protected conductors in parallel with unprotected conductors. 5. Minimize all Printed-Circuit Board (PCB) conductive loops including power and ground loops. 6. Minimize the length of the transient return path to ground. 7. Avoid using shared transient return paths to a common ground point. 8. Ground planes should be used whenever possible. For multilayer PCBs, use ground vias. Fig 10. Application diagram 006aaa163 GND PESDxL2BT line 2 to be protected line 1 to be protected |
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