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ZVN3320F Datasheet(PDF) 1 Page - Zetex Semiconductors |
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ZVN3320F Datasheet(HTML) 1 Page - Zetex Semiconductors |
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1 / 1 page SOT23 N-CHANNEL ENHANCEMENT MODE VERTICAL DMOS FET ISSUE 3 – DECEMBER 1995 7 FEATURES * 200 Volt V DS *R DS(on)=25Ω PARTMARKING DETAIL – MU ABSOLUTE MAXIMUM RATINGS. PARAMETER SYMBOL VALUE UNIT Drain-Source Voltage V DS 200 V Continuous Drain Current at T amb=25°C I D 60 mA Pulsed Drain Current I DM 1A Gate-Source Voltage V GS ± 20 V Power Dissipation at T amb=25°C P tot 330 mW Operating and Storage Temperature Range T j:Tstg -55 to +150 °C ELECTRICAL CHARACTERISTICS (at Tamb = 25°C unless otherwise stated). PARAMETER SYMBOL MIN. MAX. UNIT CONDITIONS. Drain-Source Breakdown Voltage BV DSS 200 V I D=1mA, VGS=0V Gate-Source Threshold Voltage V GS(th) 1.0 3.0 V I D=1mA, VDS=VGS Gate-Body Leakage I GSS 100 nA V GS=± 20V, VDS=0V Zero Gate Voltage Drain Current I DSS 10 50 µA µA V DS=200V, VGS=0V V DS=160V, VGS=0V, T=125°C(2) On-State Drain Current(1) I D(on) 250 mA V DS=25V, VGS=10V Static Drain-Source On-State Resistance (1) R DS(on) 25 Ω V GS=10V,ID=100mA Forward Transconductance(1) (2) g fs 75 mS V DS=25V,ID=100mA Input Capacitance (2) C iss 45 pF Common Source Output Capacitance (2) C oss 18 pF V DS=25V, VGS=0V, f=1MHz Reverse Transfer Capacitance (2) C rss 5pF Turn-On Delay Time (2)(3) t d(on) 5ns V DD ≈25V, I D=100mA Rise Time (2)(3) t r 7ns Turn-Off Delay Time (2)(3) t d(off) 6ns Fall Time (2)(3) t f 6ns (1) Measured under pulsed conditions. Width=300 µs. Duty cycle ≤2% (2) Sample test. (3) Switching times measured with 50 Ω source impedance and <5ns rise time on a pulse generator ZVN3320F D G S SOT23 3 - 398 |
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