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PDTC115EEF Datasheet(PDF) 4 Page - NXP Semiconductors |
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PDTC115EEF Datasheet(HTML) 4 Page - NXP Semiconductors |
4 / 14 page 2004 Aug 06 4 NXP Semiconductors Product data sheet NPN resistor-equipped transistors; R1 = 100 k Ω, R2 = 100 kΩ PDTC115E series ORDERING INFORMATION LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 60134). Notes 1. Refer to standard mounting conditions. 2. Reflow soldering is the only recommended soldering method. 3. Refer to SOT883 standard mounting conditions; FR4 with 60 μm copper strip line. TYPE NUMBER PACKAGE NAME DESCRIPTION VERSION PDTC115EE − plastic surface mounted package; 3 leads SOT416 PDTC115EEF − plastic surface mounted package; 3 leads SOT490 PDTC115EK − plastic surface mounted package; 3 leads SOT346 PDTC115EM − leadless ultra small plastic package; 3 solder lands; body 1.0 × 0.6 × 0.5 mm SOT883 PDTC115ES − plastic single-ended leaded (through hole) package; 3 leads SOT54 PDTC115ET − plastic surface mounted package; 3 leads SOT23 PDTC115EU − plastic surface mounted package; 3 leads SOT323 SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT VCBO collector-base voltage open emitter − 50 V VCEO collector-emitter voltage open base − 50 V VEBO emitter-base voltage open collector − 10 V VI input voltage positive − +40 V negative − −10 V IO output current (DC) − 20 mA ICM peak collector current − 100 mA Ptot total power dissipation Tamb ≤ 25 °C SOT54 note 1 − 500 mW SOT23 note 1 − 250 mW SOT346 note 1 − 250 mW SOT323 note 1 − 200 mW SOT416 note 1 − 150 mW SOT883 notes 2 and 3 − 250 mW SOT490 notes 1 and 2 − 250 mW Tstg storage temperature −65 +150 °C Tj junction temperature − 150 °C Tamb operating ambient temperature −65 +150 °C |
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