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PCA9632TK2 Datasheet(PDF) 2 Page - NXP Semiconductors |
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PCA9632TK2 Datasheet(HTML) 2 Page - NXP Semiconductors |
2 / 38 page PCA9632_3 © NXP B.V. 2008. All rights reserved. Product data sheet Rev. 03 — 15 July 2008 2 of 38 NXP Semiconductors PCA9632 4-bit Fm+ I2C-bus low power LED driver The Software Reset (SWRST) Call allows the master to perform a reset of the PCA9632 through the I2C-bus, identical to the Power-On Reset (POR) that initializes the registers to their default state causing the outputs to be set high-impedance. This allows an easy and quick way to reconfigure all device registers to the same condition. 2. Features I 40× power reduction compared to PCA9633 I 4 LED drivers. Each output programmable at: N Off N On N Programmable LED brightness N Programmable group dimming/blinking mixed with individual LED brightness I 1 MHz Fast-mode Plus I2C-bus interface with 30 mA high drive capability on SDA output for driving high capacitive buses I 256-step (8-bit) linear programmable brightness per LED output varying from fully off (default) to maximum brightness using a 1.5625 kHz PWM signal in Individual brightness mode I 64-step (6-bit) linear programmable brightness for each LED output varying from fully off (default) to maximum brightness using a 6.25 kHz PWM signal in group dimming mode I In group dimming mode, 16-step group brightness control allows global dimming (using a 190 Hz PWM signal) from fully off to maximum brightness (default) I 256-step (8-bit) linear programmable brightness per LED output varying from fully off (default) to maximum brightness using a 1.5625 kHz PWM signal in group blinking mode I 64-step group blinking with frequency programmable from 24 Hz to 6 Hz and duty cycle from 0 % to 98.4 % I 256-step group blinking with frequency programmable from 6 Hz to 0.09 Hz (10.73 s) and duty cycle from 0 % to 99.6 % I Four totem pole outputs (sink 25 mA and source 10 mA at 5 V) with software programmable open-drain LED outputs selection (default at high-impedance). No input function. I 10-pin package option provides two hardware address pins allowing four devices to operate on the same bus I Output state change programmable on the Acknowledge or the STOP Command to update outputs byte-by-byte or all at the same time (default to ‘Change on STOP’). I Software Reset feature (SWRST Call) allows the device to be reset through the I2C-bus I 400 kHz internal oscillator requires no external components I Internal power-on reset I Noise filter on SDA/SCL inputs I Edge rate control on outputs I No glitch on power-up I Supports hot insertion I Low standby current of < 1 µA I Operating power supply voltage range of 2.3 V to 5.5 V |
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