PCA9509_5

© NXP B.V. 2009. All rights reserved.

Product data sheet

Rev. 05 — 10 July 2009

8 of 19

NXP Semiconductors

PCA9509

[2]

below the minimum specification of

−450 µA at cold temperature (see Figure 8 and Figure 9). This will not significantly change the rise

capacitance will result in a slower rise time and a longer transition time in general, however since the lower current is also associated

with a lower voltage swing the delay is somewhat compensated. The key point of the graphs is that the current has a temperature

dependence, and the output driver will also have the same temperature dependency so that the output offset of ~200 mV on port A is

400

µA instead of 450 µA at cold temperature, the output is designed to be somewhat resistive such that under nominal conditions

(1.1 V) the current source pull-up will source 1 mA and the output pull-down will sink the 1 mA at ~200 mV, so as the current source

current decreases the output pull-down resistance increases in order to maintain the offset.

[3]

port B output staying LOW.

[4]

port A current source current drops to 0 mA. The current source current dropping across the internal pull-down driver resistance of

about 200

[5]

As long as the chip ground is common with the input ground reference the driver resistance may be as large as 120

Ω. However, ground

offset will rapidly decrease the maximum allowed driver resistance.

[6]

Guaranteed by design.

Pins under test = An pins

(1) High limit

(2) Maximum

(3) Mean

(4) Minimum

(5) Low limit

Pins under test = An pins

(1) High limit

(2) Maximum

(3) Mean

(4) Minimum

(5) Low limit

Fig 8.

LOW-level input current as a function of

Fig 9.

LOW-level input current as a function of

−1.6

−0.4

−0.8

−1.2

0

(mA)

−40

85

002aae733

(1)

(5)

(2)

(3)

(4)

25

−1.6

−0.4

−0.8

−1.2

0

(mA)

−40

85

002aae734

(1)

(5)

25

(2)

(3)

(4)